SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 1014

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
38.6
38.6.1
38.6.2
38.6.3
38.6.4
38.6.5
1014
1014
Functional Description
SAM4S
SAM4S
ACC Description
Analog Settings
Write Protection System
Automatic Output Masking Period
Fault Mode
The Analog Comparator Controller mainly controls the analog comparator settings. There is also
post processing of the analog comparator output.
The output of the analog comparator is masked for the time the output may be invalid. This situ-
ation is encountered as soon as the analog comparator settings are modified.
A comparison flag is triggered by an event on the output of the analog comparator and an inter-
rupt can be generated accordingly. The event on the analog comparator output can be selected
among falling edge, rising edge or any edge.
The registers for programming are listed in
The user can select the input hysteresis and configure high-speed or low-speed options.
In order to provide security to the Analog Comparator Controller, a write protection system has
been implemented.
The write protection mode prevents writing
ter. When this mode is enabled and one of the protected registers is written, the register write
request is canceled.
Due to the nature of the write protection feature, enabling and disabling the write protection
mode requires a security code. Thus when enabling or disabling the write protection mode, the
WPKEY field of the ACC_WPMR register must be filled with the “ACC” ASCII code (correspond-
ing to 0x414343), otherwise the register write will be canceled.
As soon as the analog comparator settings change, the output is invalid for a duration depend-
ing on ISEL current.
A masking period is automatically triggered as soon as a write access is performed on ACC_MR
or ACC_ACR registers (whatever the register data content).
When ISEL = 0, the mask period is 8*tMCK, else 128*tMCK.
The masking period is reported by reading a negative value (bit 31 set) on ACC_ISR register
The FAULT output can be used to propagate a comparison match and act immediately via com-
binatorial logic by using the FAULT output which is directly connected to the FAULT input of the
PWM.
The source of the FAULT output can be configured to be either a combinational value derived
from the analog comparator output or the MCK resynchronized value (Refer to
”Analog Comparator Controller Block
• shortest propagation delay/highest current consumption
• longest propagation delay/lowest current consumption
Diagram”).
ACC Mode Register
Table 38-3 on page
1015.
and
ACC Analog Control Regis-
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Figure 38-1

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