SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 539

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
28.5
Figure 28-3. I/O Line Control Logic
28.5.1
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
PIO_SCDR
Peripheral C Output Enable
Peripheral D Output Enable
Peripheral A Output Enable
Peripheral B Output Enable
Functional Description
Slow Clock
Pull-up and Pull-down Resistor Control
Peripheral C Output
Peripheral D Output
Peripheral A Output
Peripheral B Output
PIO Clock
PIO_IFSCDR[0]
PIO_IFSCER[0]
PIO_IFSCSR[0]
Divider
Clock
PIO_ABCDSR1[0]
PIO_ABCDSR2[0]
The PIO Controller features up to 32 fully-programmable I/O lines. Most of the control logic asso-
ciated to each I/O is represented in
represents but one of up to 32 possible indexes.
Each I/O line is designed with an embedded pull-up resistor and an embedded pull-down resis-
tor. The pull-up resistor can be enabled or disabled by writing respectively PIO_PUER (Pull-up
Enable Register) and PIO_PUDR (Pull-up Disable Resistor). Writing in these registers results in
setting or clearing the corresponding bit in PIO_PUSR (Pull-up Status Register). Reading a 1 in
PIO_PUSR means the pull-up is disabled and reading a 0 means the pull-up is enabled. The
1
0
PIO_IFER[0]
PIO_IFDR[0]
Programmable
PIO_OER[0]
PIO_ODR[0]
Debouncing
00
01
10
11
00
01
10
11
PIO_IFSR[0]
Glitch
Filter
or
PIO_OSR[0]
PIO_SODR[0]
PIO_CODR[0]
PIO_PER[0]
PIO_PDR[0]
1
0
PIO_ODSR[0]
PIO_PSR[0]
Resynchronization
D
DFF
Q
Stage
D
PIO_PDSR[0]
DFF
Q
1
0
1
0
Figure
PIO_MDER[0]
PIO_MDDR[0]
DETECTOR
28-3. In this description each signal shown
PIO_IER[31]
PIO_IDR[31]
EVENT
PIO_MDSR[0]
PIO_IER[0]
PIO_IDR[0]
PIO_IMR[31]
PIO_ISR[31]
PIO_IMR[0]
1
0
0
1
PIO_PUER[0]
PIO_PUDR[0]
PIO_ISR[0]
PIO_PUSR[0]
(Up to 32 possible inputs)
PIO Interrupt
Peripheral A Input
Peripheral B Input
Peripheral C Input
Peripheral D Input
SAM4S
SAM4S
Pad
539
539

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