SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 157

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.6.7.3
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
QADD and QSUB
Saturating Add and Saturating Subtract, signed.
Syntax
op{cond} {Rd}, Rn, Rm
op{cond} {Rd}, Rn, Rm
where:
op
cond
Rd
Rn, Rm
Operation
These instructions add or subtract two, four or eight values from the first and second operands
and then writes a signed saturated value in the destination register.
The
to the signed range -2
instruction, 32, 16 or 8.
If the returned result is different from the value to be saturated, it is called saturation. If satura-
tion occurs, the
the Q flag unchanged. The 8-bit and 16-bit
unchanged.
To clear the Q flag to 0, the
To read the state of the Q flag, the
Restrictions
Do not use SP and do not use PC
Condition Flags
These instructions do not affect the condition code flags.
If saturation occurs, these instructions set the Q flag to 1.
Examples
QADD16 R7, R4, R2 ; Adds halfwords of R4 with corresponding halfword of
QADD8
QADD
and
R3, R1, R6
QSUB
are registers holding the first and second operands.
is one of:
QADD
QADD8
QADD16
QSUB
QSUB8
QSUB16
is an optional condition code, see
is the destination register.
QADD
instructions apply the specified add or subtract, and then saturate the result
Saturating 32-bit subtraction.
Saturating 32-bit add.
Saturating four 8-bit integer subtraction.
Saturating four 8-bit integer additions.
and
Saturating two 16-bit integer additions.
Saturating two 16-bit integer subtraction.
n–1
; R2, saturates to 16 bits and writes to corresponding
; halfword of R7
; Adds bytes of R1 to the corresponding bytes of R6,
; saturates to 8 bits and writes to corresponding byte of
QSUB
£ x £ 2
MSR
instructions set the Q flag to 1 in the APSR. Otherwise, it leaves
instruction must be used; see
n–1
.
MRS
-1, where
instruction must be used; see
QADD
“Conditional Execution”
x
is given by the number of bits applied in the
and
QSUB
instructions always leave the Q flag
“MSR”
.
“MRS”
.
.
SAM4S
SAM4S
157
157

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