SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 225

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
0: Memory management fault exception is not active.
1: Memory management fault exception is active.
If the user disables a system handler and the corresponding fault occurs, the processor treats the fault as a hard fault.
The user can write to this register to change the pending or active status of system exceptions. An OS kernel can write to
the active bits to perform a context switch that changes the current exception type.
11.9.1.13
Name:
Access:
Reset:
• IACCVIOL: Instruction Access Violation flag
This is part of
0: No instruction access violation fault.
1: The processor attempted an instruction fetch from a location that does not permit execution.
This fault occurs on any access to an XN region, even when the MPU is disabled or not present.
When this bit is 1, the PC value stacked for the exception return points to the faulting instruction. The processor has not
written a fault address to the SCB_MMFAR register.
• DACCVIOL: Data Access Violation flag
This is part of
0: No data access violation fault.
1: The processor attempted a load or store at a location that does not permit the operation.
When this bit is 1, the PC value stacked for the exception return points to the faulting instruction. The processor has loaded
the SCB_MMFAR register with the address of the attempted access.
• MUNSTKERR: Memory Manager Fault on Unstacking for a Return From Exception
This is part of
0: No unstacking fault.
1: Unstack for an exception return has caused one or more access violations.
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
MMARVALID
BFRVALID
31
23
15
7
Configurable Fault Status Register
SCB_CFSR
Read-write
0x000000000
“MMFSR: Memory Management Fault Status Subregister”
“MMFSR: Memory Management Fault Status Subregister”
“MMFSR: Memory Management Fault Status Subregister”
30
22
14
6
MLSPERR
29
21
13
5
MSTKERR
STKERR
28
20
12
4
MUNSTKERR
UNSTKERR
NOCP
27
19
11
3
.
.
.
IMPRECISERR
INVPC
26
18
10
2
PRECISERR
DIVBYZERO
DACCVIOL
INVSTATE
25
17
9
1
UNDEFINSTR
SAM4S
SAM4S
UNALIGNED
IACCVIOL
IBUSERR
24
16
8
0
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