SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 161

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.6.7.5
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
QDADD and QDSUB
Saturating Double and Add and Saturating Double and Subtract, signed.
Syntax
op{cond} {Rd}, Rm, Rn
where:
op
cond
Rd
Rm, Rn
Operation
The
The
Both the doubling and the addition or subtraction have their results saturated to the 32-bit signed
integer range –2
APSR.
Restrictions
Do not use SP and do not use PC
Condition Flags
If saturation occurs, these instructions set the Q flag to 1.
Examples
QDADD
QDSUB
• Doubles the second operand value.
• Adds the result of the doubling to the signed saturated value in the first operand.
• Writes the result to the destination register.
• Doubles the second operand value.
• Subtracts the doubled value from the signed saturated value in the first operand.
• Writes the result to the destination register.
QDADD
QDSUB
instruction:
instruction:
R0, R3, R5
R7, R4, R2
are registers holding the first and second operands.
is one of:
QDADD
QDSUB
is an optional condition code, see
is the destination register.
31
x
Saturating Double and Subtract.
Saturating Double and Add.
2
31
– 1. If saturation occurs in either operation, it sets the Q flag in the
; Subtracts R3 doubled and saturated to 32 bits
; Doubles and saturates R4 to 32 bits, adds R2,
; saturates to 32 bits, writes to R7
; from R5, saturates to 32 bits, writes to R0.
.
“Conditional Execution”
.
SAM4S
SAM4S
161
161

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