SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 119

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.6.5.9
SADD16 and SADD8
Signed Add 16 and Signed Add 8
Syntax
op{cond}{Rd,} Rn, Rm
where:
op
cond
Rd
Rn
Rm
Operation
Use these instructions to perform a halfword or byte add in parallel:
The
SADD16
1. Adds each halfword from the first operand to the corresponding halfword of the second
operand.
2. Writes the result in the corresponding halfwords of the destination register.
The
SADD8
1. Adds each byte of the first operand to the corresponding byte of the second operand.
Writes the result in the corresponding bytes of the destination register.
Restrictions
Do not use SP and do not use PC
Condition Flags
These instructions do not change the flags.
Examples
SADD16 R1, R0
SADD8 R4, R0, R5 ; Adds bytes of R0 to the corresponding byte in R5 and writes
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
is any of:
Performs two 16-bit signed integer additions.
SADD16
Performs four 8-bit signed integer additions.
SADD8
is an optional condition code, see
is the destination register.
is the first register holding the operand.
is the second register holding the operand.
instruction:
instruction:
.
; Adds the halfwords in R0 to the corresponding halfwords of
; R1 and writes to corresponding halfword of R1.
; to the corresponding byte in R4.
“Conditional Execution”
.
SAM4S
SAM4S
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