SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 420

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
24.8
24.8.1
24.8.1.1
24.8.1.2
420
420
Standard Read and Write Protocols
SAM4S
SAM4S
Read Waveforms
NRD Waveform
NCS Waveform
In the following sections, NCS represents one of the NCS[0..3] chip select lines.
The read cycle is shown on
The read cycle starts with the address setting on the memory address bus.
Figure 24-5. Standard Read Cycle
The NRD signal is characterized by a setup timing, a pulse width and a hold timing.
Similarly, the NCS signal can be divided into a setup time, pulse length and hold time:
1. NRD_SETUP: the NRD setup time is defined as the setup of address before the NRD
2. NRD_PULSE: the NRD pulse length is the time between NRD falling edge and NRD
3. NRD_HOLD: the NRD hold time is defined as the hold time of address after the NRD
1. NCS_RD_SETUP: the NCS setup time is defined as the setup time of address before
2. NCS_RD_PULSE: the NCS pulse length is the time between NCS falling edge and
3. NCS_RD_HOLD: the NCS hold time is defined as the hold time of address after the
falling edge;
rising edge;
rising edge.
the NCS falling edge.
NCS rising edge;
NCS rising edge.
A[23:0]
D[7:0]
MCK
NRD
NCS
NCS_RD_SETUP
NRD_SETUP
Figure
24-5.
NCS_RD_PULSE
NRD_CYCLE
NRD_PULSE
NRD_HOLD
NCS_RD_HOLD
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11

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