SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 74

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Fault Status Registers and Fault Address Registers
Lockup
SAM4S
SAM4S
If a bus fault occurs during a stack push when entering a bus fault handler, the bus fault does not
escalate to a hard fault. This means that if a corrupted stack causes a fault, the fault handler
executes even though the stack push for the handler failed. The fault handler operates but the
stack contents are corrupted.
Note:
The fault status registers indicate the cause of a fault. For bus faults and memory management
faults, the fault address register indicates the address accessed by the operation that caused
the fault, as shown in
Table 11-12. Fault Status and Fault Address Registers
The processor enters a lockup state if a hard fault occurs when executing the NMI or hard fault
handlers. When the processor is in lockup state, it does not execute any instructions. The pro-
cessor remains in lockup state until either:
Note:
Handler
Hard fault
Memory
management fault
Bus fault
Usage fault
• A fault occurs and the handler for that fault is not enabled.
• it is reset
• an NMI occurs
• it is halted by a debugger.
Only Reset and NMI can preempt the fixed priority hard fault. A hard fault can preempt any excep-
tion other than Reset, NMI, or another hard fault.
If the lockup state occurs from the NMI handler, a subsequent NMI does not cause the processor
to leave the lockup state.
Status Register
Name
SCB_HFSR
MMFSR
BFSR
UFSR
Table
11-12.
Address
Register Name
-
SCB_MMFAR
SCB_BFAR
-
Register Description
“Hard Fault Status Register”
“MMFSR: Memory Management Fault
Status Subregister”
“MemManage Fault Address Register”
“BFSR: Bus Fault Status Subregister”
“Bus Fault Address Register”
“UFSR: Usage Fault Status
Subregister”
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11

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