SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 241

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.11.1.4
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Updating an MPU Region Using Multi-word Writes
The software must use memory barrier instructions:
However, memory barrier instructions are not required if the MPU setup process starts by enter-
ing an exception handler, or is followed by an exception return, because the exception entry and
exception return mechanisms cause memory barrier behavior.
The software does not need any memory barrier instructions during an MPU setup, because it
accesses the MPU through the PPB, which is a Strongly-Ordered memory region.
For example, if the user wants all of the memory access behavior to take effect immediately after
the programming sequence, a DSB instruction and an ISB instruction must be used. A DSB is
required after changing MPU settings, such as at the end of a context switch. An ISB is required
if the code that programs the MPU region or regions is entered using a branch or call. If the pro-
gramming sequence is entered using a return from exception, or by taking an exception, then an
ISB is not required .
The user can program directly using multi-word writes, depending on how the information is
divided. Consider the following reprogramming:
Use an STM instruction to optimize this:
• before the MPU setup, if there might be outstanding memory transfers, such as buffered
• after the MPU setup, if it includes memory transfers that must use the new MPU settings.
writes, that might be affected by the change in MPU settings
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
BIC R2, R2, #1
STRH R2, [R0, #0x8]
STR R4, [R0, #0x4]
STRH R3, [R0, #0xA]
ORR R2, #1
STRH R2, [R0, #0x8]
; R1 = region number
; R2 = address
; R3 = size, attributes in one
LDR R0, =MPU_RNR
STR R1, [R0, #0x0]
STR R2, [R0, #0x4]
STR R3, [R0, #0x8]
; R1 = region number
; R2 = address
; R3 = size, attributes in one
LDR R0, =MPU_RNR
STM R0, {R1-R3}
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Attribute, Size and Enable
; 0xE000ED98, MPU region number register
; Region Number, address, attribute, size and enable
; 0xE000ED98, MPU region number register
; Region Number
; Disable
; Region Size and Enable
; Region Base Address
; Region Attribute
; Enable
; Region Size and Enable
SAM4S
SAM4S
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