SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 546

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Figure 28-8. Input Change Interrupt Timings if there are no Additional Interrupt Modes
28.5.11
28.5.12
28.5.13
28.5.13.1
28.5.13.2
546
546
Read PIO_ISR
Pin Level
PIO_ISR
SAM4S
SAM4S
MCK
I/O Lines Lock
Programmable Schmitt Trigger
Parallel Capture Mode
Overview
Functional Description
The other lines are configured in Falling Edge or Low Level detection by default, if they have not
been previously configured. Otherwise, lines 1, 3 and 6 must be configured in Falling Edge/Low
Level detection by writing 32’h0000_004A in PIO_FELLSR.
When an I/O line is controlled by a peripheral (particularly the Pulse Width Modulation Controller
PWM), it can become locked by the action of this peripheral via an input of the PIO controller.
When an I/O line is locked, the write of the corresponding bit in the registers PIO_PER,
PIO_PDR, PIO_MDER, PIO_MDDR, PIO_PUDR, PIO_PUER, PIO_ABCDSR1 and
PIO_ABCDSR2 is discarded in order to lock its configuration. The user can know at anytime
which I/O line is locked by reading the PIO Lock Status register PIO_LOCKSR. Once an I/O line
is locked, the only way to unlock it is to apply a hardware reset to the PIO Controller.
It is possible to configure each input for the Schmitt Trigger. By default the Schmitt trigger is
active. Disabling the Schmitt Trigger is requested when using the QTouch
The PIO Controller integrates an interface able to read data from a CMOS digital image sensor,
a high-speed parallel ADC, a DSP synchronous port in synchronous mode, etc.... For better
understanding and to ease reading, the following description uses an example with a CMOS dig-
ital image sensor.
The CMOS digital image sensor provides a sensor clock, an 8-bit data synchronous with the
sensor clock, and two data enables which are synchronous with the sensor clock too.
APB Access
APB Access
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Library.

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