SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 1067

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
40.4
Table 40-1.
40.5
40.5.1
40.5.2
40.5.3
40.6
40.6.1
40.6.2
40.6.3
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Pin Name
DAC0 - DAC1
DATRG
Signal Description
Product Dependencies
Functional Description
Power Management
Interrupt Sources
Conversion Performances
Digital-to-Analog Conversion
Conversion Results
Conversion Triggers
DACC Pin Description
The DACC becomes active as soon as a conversion is requested and at least one channel is
enabled. The DACC is automatically deactivated when no channels are enabled.
For power saving options see
The DACC interrupt line is connected on one of the internal sources of the interrupt controller.
Using the DACC interrupt requires the interrupt controller to be programmed first.
Table 40-2.
For performance and electrical characteristics of the DACC, see the product DC Characteristics
section.
The DACC uses the master clock (MCK) divided by two to perform conversions. This clock is
named DACC Clock. Once a conversion starts the DACC takes
analog result on the selected analog output.
When a conversion is completed, the resulting analog value is available at the selected DACC
channel output and the EOC bit in the
Reading the DACC_ISR register clears the EOC bit.
In free running mode, conversion starts as soon as at least one channel is enabled and data is
written in the
data is available at the corresponding analog output as stated above.
In external trigger mode, the conversion waits for a rising edge on the selected trigger to begin.
Warning: Disabling the external trigger mode automatically sets the DACC in free running
mode.
Instance
DACC
DACC Conversion Data
Peripheral IDs
Description
Analog output channels
External triggers
30
ID
Section 40.6.6 ”Sleep
Register, then 25 DACC Clock periods later, the converted
DACC Interrupt Status
Mode”.
Register, is set.
25
clock periods to provide the
SAM4S
SAM4S
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1067

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