SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 115

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.6.5.6
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
MOV and MVN
Move and Move NOT.
Syntax
MOV{S}{cond} Rd, Operand2
MOV{cond} Rd, #imm16
MVN{S}{cond} Rd, Operand2
where:
S
cond
Rd
Operand2
imm16
Operation
The
When
is the corresponding shift instruction:
Also, the
See
The
value, and places the result into
The
operand.
Restrictions
SP and PC only can be used in the
When
• the second operand must be a register without shift
• the S suffix must not be specified.
• bit[0] of the value written to the PC is ignored
ASR{S}{cond} Rd, Rm, #n
LSL{S}{cond} Rd, Rm, #n
LSR{S}{cond} Rd, Rm, #n
ROR{S}{cond} Rd, Rm, #n
RRX{S}{cond} Rd, Rm
MOV{S}{cond} Rd, Rm, ASR Rs
MOV{S}{cond} Rd, Rm, LSL Rs
MOV{S}{cond} Rd, Rm, LSR Rs
MOV{S}{cond} Rd, Rm, ROR Rs
MOV
“ASR, LSL, LSR, ROR, and RRX”
MVN
MOVW
Rd
Operand2
instruction copies the value of
instruction takes the value of
is PC in a
MOV
instruction provides the same function as
instruction permits additional forms of
in a
is an optional suffix. If
result of the operation, see
is an optional condition code, see
is the destination register.
is a flexible second operand. See
options.
is any value in the range 0-65535.
MOV
MOV
is the preferred syntax for
is the preferred syntax for
is the preferred syntax for
is the preferred syntax for
is the preferred syntax for
instruction is a register with a shift other than
instruction:
is a synonym for
is a synonym for
is a synonym for
is a synonym for
Rd
.
MOV
S
Operand2
.
Operand2
instruction, with the following restrictions:
is specified, the condition code flags are updated on the
“Conditional Execution”
LSL{S}{cond} Rd, Rm, Rs
LSR{S}{cond} Rd, Rm, Rs
ASR{S}{cond} Rd, Rm, Rs
ROR{S}{cond} Rd, Rm, Rs
, performs a bitwise logical NOT operation on the
MOV{S}{cond} Rd, Rm, RRX
into
MOV{S}{cond} Rd, Rm, LSL #n
MOV{S}{cond} Rd, Rm, LSR #n
“Flexible Second Operand”
MOV{S}{cond} Rd, Rm, ASR #n
“Conditional Execution”
MOV{S}{cond} Rd, Rm, ROR #n
Rd
Operand2
.
MOV
, but is restricted to using the
as synonyms for shift instructions:
.
.
LSL #0
.
if
n
for details of the
, the preferred syntax
!= 0
SAM4S
SAM4S
imm16
115
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