SAM4S16C

Manufacturer Part NumberSAM4S16C
ManufacturerAtmel Corporation
SAM4S16C datasheets
 

Specifications of SAM4S16C

Flash (kbytes)1024 KbytesPin Count100
# Of Touch Channels32Hardware Qtouch AcquisitionNo
Max I/o Pins79Ext Interrupts79
Usb Transceiver1Quadrature Decoder Channels2
Usb SpeedFull SpeedUsb InterfaceDevice
Spi3Twi (i2c)2
Uart4Ssc1
Sd / Emmc1Graphic LcdNo
Video DecoderNoCamera InterfaceNo
Adc Channels16Adc Resolution (bits)12
Adc Speed (ksps)1000Analog Comparators1
Resistive Touch ScreenNoDac Channels2
Dac Resolution (bits)12Temp. SensorYes
Crypto EngineNoSram (kbytes)128
Self Program MemoryYESExternal Bus Interface1
Dram MemoryNoNand InterfaceYes
PicopowerNoTemp. Range (deg C)-40 to 85
I/o Supply Class1.8/3.3Operating Voltage (vcc)1.62 to 3.6
FpuNoMpu / MmuYes / No
Timers6Output Compare Channels6
Input Capture Channels6Pwm Channels4
32khz RtcYesCalibrated Rc OscillatorYes
show all specifications
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28. Parallel Input/Output Controller (PIO)
28.1
Description
The Parallel Input/Output Controller (PIO) manages up to 32 fully programmable input/output
lines. Each I/O line may be dedicated as a general-purpose I/O or be assigned to a function of
an embedded peripheral. This assures effective optimization of the pins of a product.
Each I/O line is associated with a bit number in all of the 32-bit registers of the 32-bit wide User
Interface.
Each I/O line of the PIO Controller features:
• An input change interrupt enabling level change detection on any I/O line.
• Additional Interrupt modes enabling rising edge, falling edge, low level or high level detection
on any I/O line.
• A glitch filter providing rejection of glitches lower than one-half of PIO clock cycle.
• A debouncing filter providing rejection of unwanted pulses from key or push button
operations.
• Multi-drive capability similar to an open drain I/O line.
• Control of the pull-up and pull-down of the I/O line.
• Input visibility and output control.
The PIO Controller also features a synchronous output providing up to 32 bits of data output in a
single write operation.
An 8-bit parallel capture mode is also available which can be used to interface a CMOS digital
image sensor, an ADC, a DSP synchronous port in synchronous mode, etc...
28.2
Embedded Characteristics
• Up to 32 Programmable I/O Lines
• Fully Programmable through Set/Clear Registers
• Multiplexing of Four Peripheral Functions per I/O Line
• For each I/O Line (Whether Assigned to a Peripheral or Used as General Purpose I/O)
– Input Change Interrupt
– Programmable Glitch Filter
– Programmable Debouncing Filter
– Multi-drive Option Enables Driving in Open Drain
– Programmable Pull Up on Each I/O Line
– Pin Data Status Register, Supplies Visibility of the Level on the Pin at Any Time
– Additional Interrupt Modes on a Programmable Event: Rising Edge, Falling Edge,
– Lock of the Configuration by the Connected Peripheral
• Synchronous Output, Provides Set and Clear of Several I/O lines in a Single Write
• Write Protect Registers
• Programmable Schmitt Trigger Inputs
• Parallel Capture Mode
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Low Level or High Level
SAM4S
SAM4S
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