SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 72

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.4.3.8
Table 11-11. Faults
72
72
Fault
Bus error on a vector read
Fault escalated to a hard fault
Exception Return
Fault Types
SAM4S
SAM4S
Fault Handling
An Exception return occurs when the processor is in Handler mode and executes one of the fol-
lowing instructions to load the EXC_RETURN value into the PC:
EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism
relies on this value to detect when the processor has completed an exception handler. The low-
est five bits of this value provide information on the return stack and processor mode.
10
All EXC_RETURN values have bits[31:5] set to one. When this value is loaded into the PC, it
indicates to the processor that the exception is complete, and the processor initiates the appro-
priate exception return sequence.
Table 11-10. Exception Return Behavior
Faults are a subset of the exceptions, see
Table 11-11
tus register, and the register bit that indicates that the fault has occurred. See
Fault Status Register”
EXC_RETURN[31:0]
0xFFFFFFF1
0xFFFFFFF9
0xFFFFFFFD
• an
• an
• a
• a bus error on:
• an internally-detected error such as an undefined instruction
• an attempt to execute an instruction from a memory region marked as Non-Executable
• a privilege violation or an attempt to access an unmanaged region causing an MPU fault.
shows the EXC_RETURN values with a description of the exception return behavior.
BX
– an instruction fetch or vector table load
– a data access
LDM
LDR
instruction using any register.
instruction with the PC as the destination.
or
shows the types of fault, the handler used for the fault, the corresponding fault sta-
POP
instruction that loads the PC
Handler
Hard fault
for more information about the fault status registers.
Description
Return to Handler mode, exception return uses non-floating-point state
from the MSP and execution uses MSP after return.
Return to Thread mode, exception return uses non-floating-point state from
MSP and execution uses MSP after return.
Return to Thread mode, exception return uses non-floating-point state from
the PSP and execution uses PSP after return.
Bit Name
VECTTBL
FORCED
“Exception Model”
Fault Status Register
“Hard Fault Status Register”
. The following generate a fault:
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
“Configurable
Table 11-
(XN).

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