SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 984

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
984
984
SAM4S
SAM4S
load sent by the host, while the current data payload is received by the USB device. Thus two
banks of memory are used. While one is available for the microcontroller, the other one is locked
by the USB device.
Figure 37-11. Bank Swapping in Data OUT Transfers for Ping-pong Endpoints
When using a ping-pong endpoint, the following procedures are required to perform Data OUT
transactions:
1. The host generates a Data OUT packet.
2. This packet is received by the USB device endpoint. It is written in the endpoint’s FIFO
3. The USB device sends an ACK PID packet to the host. The host can immediately send
4. The microcontroller is notified that the USB device has received a data payload, polling
5. The number of bytes available in the FIFO is made available by reading RXBYTECNT
6. The microcontroller transfers out data received from the endpoint’s memory to the
7. The microcontroller notifies the USB peripheral device that it has finished the transfer
8. A third Data OUT packet can be accepted by the USB peripheral device and copied in
9. If a second Data OUT packet has been received, the microcontroller is notified by the
10. The microcontroller transfers out data received from the endpoint’s memory to the
Bank 0.
a second Data OUT packet. It is accepted by the device and copied to FIFO Bank 1.
RX_DATA_BK0 in the endpoint’s UDP_CSRx register. An interrupt is pending for this
endpoint while RX_DATA_BK0 is set.
in the endpoint’s UDP_CSRx register.
microcontroller’s memory. Data received is made available by reading the endpoint’s
UDP_FDRx register.
by clearing RX_DATA_BK0 in the endpoint’s UDP_CSRx register.
the FIFO Bank 0.
flag RX_DATA_BK1 set in the endpoint’s UDP_CSRx register. An interrupt is pending
for this endpoint while RX_DATA_BK1 is set.
microcontroller’s memory. Data received is available by reading the endpoint’s
UDP_FDRx register.
1 st Data Payload
2 nd Data Payload
3 rd Data Payload
Microcontroller
Write and Read at the Same Time
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Write
USB Device
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Read
USB Bus
2 nd Data Payload
3 rd Data Payload
1 st Data Payload
Data IN Packet
Data IN Packet
Data IN Packet
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11

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