SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 206

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.8.3.6
Name:
Access:
Reset:
The NVIC_IPR0-NVIC_IPR8 registers provide a 4-bit priority field for each interrupt. These registers are byte-accessible.
Each register holds four priority fields, that map up to four elements in the CMSIS interrupt priority array IP[0] to IP[34]
• PRI3: Priority (4m+3)
Priority, Byte Offset 3, refers to register bits [31:24].
• PRI2: Priority (4m+2)
Priority, Byte Offset 2, refers to register bits [23:16].
• PRI1: Priority (4m+1)
Priority, Byte Offset 1, refers to register bits [15:8].
• PRI0: Priority (4m)
Priority, Byte Offset 0, refers to register bits [7:0].
Notes:
206
206
31
23
15
7
1. Each priority field holds a priority value, 0-15. The lower the value, the greater the priority of the corresponding interrupt. The
2. for more information about the IP[0] to IP[34] interrupt priority array, that provides the software view of the interrupt priorities,
3. The corresponding IPR number n is given by n = m DIV 4.
4. The byte offset of the required Priority field in this register is m MOD 4.
SAM4S
SAM4S
processor implements only bits[7:4] of each field; bits[3:0] read as zero and ignore writes.
see
Interrupt Priority Registers
NVIC_IPRx [x=0..8]
Read-write
0x000000000
Table 11-28, “CMSIS Functions for NVIC Control”
30
22
14
6
29
21
13
5
28
20
12
4
PRI3
PRI2
PRI1
PRI0
.
27
19
11
3
26
18
10
2
25
17
9
1
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
24
16
8
0

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