SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 602

no-image

SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Note:
Figure 29-15. Receive Frame Format in Continuous Mode
Note:
29.7.8
Loop Mode
The receiver can be programmed to receive transmissions from the transmitter. This is done by
setting the Loop Mode (LOOP) bit in SSC_RFMR. In this case, RD is connected to TD, RF is
connected to TF and RK is connected to TK.
29.7.9
Interrupt
Most bits in SSC_SR have a corresponding bit in interrupt management registers.
The SSC can be programmed to generate an interrupt when it detects an event. The interrupt is
controlled by writing SSC_IER (Interrupt Enable Register) and SSC_IDR (Interrupt Disable Reg-
ister) These registers enable and disable, respectively, the corresponding interrupt by setting
and clearing the corresponding bit in SSC_IMR (Interrupt Mask Register), which controls the
generation of interrupts by asserting the SSC interrupt line connected to the NVIC.
Figure 29-16. Interrupt Block Diagram
SAM4S
SAM4S
602
602
1. STTDLY is set to 0. In this example, SSC_THR is loaded twice. FSDEN value has no effect on
the transmission. SyncData cannot be output in continuous mode.
Start = Enable Receiver
Data
RD
To SSC_RHR
DATLEN
1. STTDLY is set to 0.
PDC
TXBUFE
ENDTX
Transmitter
TXRDY
TXEMPTY
TXSYNC
RXBUFF
ENDRX
Receiver
RXRDY
OVRUN
RXSYNC
Data
To SSC_RHR
DATLEN
SSC_IMR
SSC_IER
SSC_IDR
Set
Clear
SSC Interrupt
Interrupt
Control
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11

Related parts for SAM4S16C