SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 656

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
30.8.5
Name:
Address:
Access:
• RDRF: Receive Data Register Full
0 = No data has been received since the last read of SPI_RDR
1 = Data has been received and the received data has been transferred from the serializer to SPI_RDR since the last read
of SPI_RDR.
• TDRE: Transmit Data Register Empty
0 = Data has been written to SPI_TDR and not yet transferred to the serializer.
1 = The last data written in the Transmit Data Register has been transferred to the serializer.
TDRE equals zero when the SPI is disabled or at reset. The SPI enable command sets this bit to one.
• MODF: Mode Fault Error
0 = No Mode Fault has been detected since the last read of SPI_SR.
1 = A Mode Fault occurred since the last read of the SPI_SR.
• OVRES: Overrun Error Status
0 = No overrun has been detected since the last read of SPI_SR.
1 = An overrun has occurred since the last read of SPI_SR.
An overrun occurs when SPI_RDR is loaded at least twice from the serializer since the last read of the SPI_RDR.
• ENDRX: End of RX buffer
0 = The Receive Counter Register has not reached 0 since the last write in SPI_RCR
1 = The Receive Counter Register has reached 0 since the last write in SPI_RCR
• ENDTX: End of TX buffer
0 = The Transmit Counter Register has not reached 0 since the last write in SPI_TCR
1 = The Transmit Counter Register has reached 0 since the last write in SPI_TCR
• RXBUFF: RX Buffer Full
0 = SPI_RCR
1 = Both SPI_RCR
656
656
TXBUFE
31
23
15
7
SAM4S
SAM4S
SPI Status Register
(1)
or SPI_RNCR
RXBUFF
(1)
and SPI_RNCR
30
22
14
SPI_SR
0x40008010
Read-only
6
(1)
has a value other than 0.
ENDTX
29
21
13
(1)
5
have a value of 0.
ENDRX
28
20
12
4
OVRES
27
19
11
3
UNDES
MODF
(1)
(1)
26
18
10
2
or SPI_RNCR
or SPI_TNCR
(1)
(1)
or SPI_RNCR
or SPI_TNCR
TXEMPTY
TDRE
(1)
(1)
25
17
9
1
.
.
(1)
(1)
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
.
.
SPIENS
NSSR
RDRF
24
16
8
0

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