SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 348

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
19.4.3.5
348
348
SAM4S
SAM4S
GPNVM Bit
One error can be detected in the EEFC_FSR register after a programming sequence:
The status of lock bits can be returned by the Enhanced Embedded Flash Controller (EEFC).
The Get Lock Bit status sequence is:
For example, if the third bit of the first word read in the EEFC_FRR is set, then the third lock
region is locked.
One error can be detected in the EEFC_FSR register after a programming sequence:
Note:
GPNVM bits do not interfere with the embedded Flash memory plane. Refer to the product defi-
nition section for information on the GPNVM Bit Action.
The set GPNVM bit sequence is:
One error can be detected in the EEFC_FSR register after a programming sequence:
It is possible to clear GPNVM bits previously set. The clear GPNVM bit sequence is:
• When the unlock completes, the FRDY bit in the Flash Programming Status Register
• If the lock bit number is greater than the total number of lock bits, then the command has no
• Command Error: a bad keyword has been written in the EEFC_FCR register.
• Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash
• The Get Lock Bit command (GLB) is written in the Flash Command Register, FARG field is
• Lock bits can be read by the software application in the EEFC_FRR register. The first word
• Command Error: a bad keyword has been written in the EEFC_FCR register.
• Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash
• Start the Set GPNVM Bit command (SGPB) by writing the Flash Command Register with the
• When the GPVNM bit is set, the bit FRDY in the Flash Programming Status Register
• If the GPNVM bit number is greater than the total number of GPNVM bits, then the command
• Command Error: a bad keyword has been written in the EEFC_FCR register.
• Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash
• Start the Clear GPNVM Bit command (CGPB) by writing the Flash Command Register with
(EEFC_FSR) rises. If an interrupt has been enabled by setting the FRDY bit in EEFC_FMR,
the interrupt line of the NVIC is activated.
effect.
memory has failed.
meaningless.
read corresponds to the 32 first lock bits, next reads providing the next 32 lock bits as long as
it is meaningful. Extra reads to the EEFC_FRR register return 0.
memory has failed.
SGPB command and the number of the GPNVM bit to be set.
(EEFC_FSR) rises. If an interrupt was enabled by setting the FRDY bit in EEFC_FMR, the
interrupt line of the NVIC is activated.
has no effect. The result of the SGPB command can be checked by running a GGPB (Get
GPNVM Bit) command.
memory has failed.
CGPB and the number of the GPNVM bit to be cleared.
Access to the Flash in read is permitted when a set, clear or get lock bit command is performed.
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11

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