MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 100

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.15
The LIN bus pin provides a physical layer for single-wire communication in automotive applications. The LIN
physical layer is designed to meet the LIN physical layer version 2.1 specification, and has the following features:
The LIN driver is a Low Side MOSFET with current limitation and thermal shutdown. An internal pull-up resistor with a serial diode
structure is integrated, so no external pull-up components are required for the application in a slave node. The fall time from
dominant to recessive and the rise time from recessive to dominant is controlled. The symmetry between both slopes is
guaranteed.
4.15.1
The LIN pin offers high susceptibility immunity level from external disturbance, guaranteeing communication during external
disturbance. See
4.15.2
The slew rate can be selected for optimized operation at 10 kBit/s and 20 kBit/s as well as a fast baud rate (100 kBit) for test and
programming. The slew rate can be adapted with the bits LINSR[1:0] in the LIN Register (LINR). The initial slew rate is 20 kBit/s.
4.15.3
The output Low Side FET (transmitter) is protected against over-temperature conditions. In case of an over-temperature
condition, the transmitter will be shut down and the bit LINOTC in the LIN Register (LINR) is set as long as the condition is
present.
If the LINOTIE bit is set in the LIN Register (LINR), an Interrupt IRQ will be generated. Acknowledge the interrupt by reading the
LIN Register (LINR). To issue a new interrupt, the condition has to vanish and occur again.
The transmitter is automatically re-enabled once the over-temperature condition is gone and TxD is High.
4.15.4
During Low Power mode operation the transmitter of the physical layer is disabled. The receiver is still active and able to detect
Wake-up events on the LIN bus line.
A dominant level longer than t
Source Register (WSR).
4.15.5
A Low Voltage Shutdown feature was implemented to allow controlled J2602 compliant LIN driver behavior under Low Voltage
conditions (LVSD=0).
When an under-voltage occurs on VS1 (LVI), the LIN stays in recessive mode if it was in recessive state. If it was in a dominant
state, it waits until the next dominant to recessive transition, then it stays in the recessive state.
When the under-voltage condition (LVI) is gone, the LIN will start operating when Tx is in a recessive state or on the next dominant
to recessive transition.
Freescale Semiconductor
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LIN physical layer 2.1 compliant
Slew rate selection 20 kBit, 10 kBit, and fast Mode (100 kBit)
Over-temperature Shutdown - HTI
Permanent Pull-up in Normal mode 30 k, 1.0 M in low power
Current limitation
External Rx / Tx access. See
Slew Rate Trim Bit. See
LIN Physical Layer Interface - LIN
LIN Pin
Slew Rate Selection
Over-temperature Shutdown (LIN Interrupt)
Low Power Mode and Wake-up Feature
J2602 Compliance
Section 3.8, “ESD Protection and Latch-up
PROPWL
Section 4.26, “MM912_634 - Analog Die Trimming
followed by a rising edge, will generate a wake-up event and be reported in the Wake-up
Section 4.18, “General Purpose I/O - PTB[0…2]
MM912_634 Advance Information, Rev. 4.0
Immunity.
LIN Physical Layer Interface - LIN
MCU
ANALOG
100