MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 241

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Address
0x003E
0x003A
0x003B
0x003C
0x003D
0x003E
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039
0x003F
0x02F0
0x02F1
0x02F2
0x02F3
0x02F4
0x02F5
CPMUAPITR
CPMUFMCS
CPMUAPIRL
RESERVEDC
RESERVEDC
RESERVED
CPMUAPIR
CPMUCLKS
RESERVED
PMUTEST0
PMUTEST1
CPMUCOP
CPMUFLG
CPMUPLL
CPMUINT
CPMURTI
POSTDIV
ARMCOP
APICTL
REFDIV
CPMU
CPMU
CPMU
CPMU
CPMU
CPMU
LVCTL
SYNR
Name
H
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
fmcs_reg_
pfd_force_
APICLK
APITR5
APIR15
PLLSEL
RTDEC
WCOP
APIR7
RTIE
Bit 7
RTIF
sel
Bit 7
en
0
0
0
0
0
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
cpmu_tes
cpmu_tes
t_clk_en
APITR4
APIR14
Table 337. CPMU Register Summary
RSBCK
APIR6
t_gfe
MM912_634 Advance Information, Rev. 4.0
PORF
PSTP
RTR6
Bit 6
= Unimplemented or Reserved
6
0
0
0
0
0
0
0
0
0
_clk_sel[1]
cpmu_test
cpmu_test
WRTMASK
_xfc_en
APITR3
APIR13
APIR5
RTR5
LVRF
FM1
Bit 5
5
0
0
0
0
0
0
0
0
0
0
0
cpmu_tes
t_clk_sel[
fc_force_
APITR2
APIR12
LOCKIE
LOCKIF
APIES
APIR4
RTR4
FM0
Bit 4
en
0]
fmcs_cs[7:0]
4
0
0
0
0
0
0
0
0
monitor_d
osc_lcp_
vcofrq2
APITR1
APIR11
isable
APIEA
APIR3
LOCK
RTR3
PRE
Bit 3
3
0
0
0
0
0
0
SYNDIV[5:0]
0
0
POSTDIV[4:0]
osc_lcp_e
xtsqw_en
APITR0
APIR10
APIFE
APIR2
RTR2
able
LVDS
ILAF
PCE
CR2
Bit 2
2
0
0
0
0
0
REFDIV[3:0]
0
pfd_force_
fm_test
OSCSEL
APIR9
APIR1
OSCIE
OSCIF
RTR1
APIE
LVIE
CR1
Bit 1
up
RTI
1
0
0
0
0
0
0
test_sqw_
pfd_force
OSCSEL
_down
UPOSC
APIR8
APIR0
RTR0
APIF
Bit 0
osc
COP
LVIF
CR0
Bit 0
0
0
0
0
0
0
0
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