MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 235

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

normal single chip mode. The application software can only erase and program the Flash options/security byte if the Flash sector
containing the Flash options/security byte is not protected (see Flash protection). Thus Flash protection is a useful means of
preventing this method. The microcontroller will enter the unsecured state after the next reset following the programming of the
security bits to the unsecured value.
This method requires that:
4.35.0.5
The microcontroller can be unsecured in special modes by erasing the entire EEPROM and Flash memory contents.
When a secure microcontroller is reset into special single chip mode (SS), the BDM firmware verifies whether the EEPROM and
Flash memory are erased. If any EEPROM or Flash memory address is not erased, only BDM hardware commands are enabled.
BDM hardware commands can then be used to write to the EEPROM and Flash registers to mass erase the EEPROM and all
Flash memory blocks.
When next reset into special single chip mode, the BDM firmware will again verify whether all EEPROM and Flash memory are
erased, and this being the case, will enable all BDM commands, allowing the Flash options/security byte to be programmed to
the unsecured value. The security bits SEC[1:0] in the Flash security register will indicate the unsecure state following the next
reset.
4.36
“Virgin” cells in the Flash array will read all programmed and the MCU will be secured as the SEC[1:0] bits would be loaded with
‘00’ from the Flash security byte.
At wafer probe NVM BIST mode is used to test and initialize the Flash IFR block. Wafer probe will leave the Flash block erased
so the MCU will be secured.
For blind-assembled products, the following sequence must be used to initialize the Flash array:
Blocking access to memories which can be secured during SCAN testing is necessary. While it would take a fair amount of
sophistication on the part of a “thief”, our DFT people still consider this a major risk to security. It is therefore highly recommended
that accesses to the FLASH and EEPROM arrays be blocked at chip level during scan test. Blocking or not blocking security at
the core level will not help this.
4.37
When silicon comes out of processing, it is extremely unlikely that the security bits will be configured for unsecure. There will
need to be “hooks” for running BIST (if present) or Burn-in by bypassing the security.
If wafer level burn-in is to be used, security must have a bypass which can be connected to by the burn-in layer. In burn-in,
security is bypassed, but when the burn-in layer is removed, the state of secreq determines whether the part is secured or not.
This may require some sort of weak pull-up device. At some point during testing the internal FLASH and EEPROM will need to
be unsecured. This test program should follow the same sequence as a user to unsecure the part: erase the memories, bring the
part up in special mode, erase and program the security bits to the unsecured state.
Freescale Semiconductor
•
•
•
•
•
•
•
•
•
•
•
The application software previously programmed into the microcontroller has been designed to have the capability to
erase and program the Flash options/security byte, or security is first disabled using the backdoor key method, allowing
BDM to be used to issue commands to erase and program the Flash options/security byte.
The Flash sector containing the Flash options/security byte is not protected.
Reset the MCU into special mode.
Set FCLKDIV to provide a proper FCLK period.
Set FPROT register to the unprotected state.
Set the WRALL bit in the FTSTMOD register, if available.
Load the Flash Pulse Timer with the mass erase time by executing a LDPTMR command write sequence.
Execute MASERSI commands to mass erase the Flash main block and Flash IFR block.
Execute the LDPTMR and PGMI command write sequence to program all timing parameters into the Flash IFR block.
Reset the MCU into special single chip mode. After the reset the BDM secure firmware executes a blank check
command. If the blank check succeeds the MCU will be temporarily unsecured.
Execute the PGM command write sequence to program the security byte to the unsecured state.
Initialization of a Virgin Device
Impact of Security on Test
Complete Memory Erase (Special Modes)
MM912_634 Advance Information, Rev. 4.0
235