MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 58

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The Reset Status Register (RSR) will indicate the source of the reset by individual flags.
See also
4.4.3
In Normal mode, all MM912_634 analog die user functions are active and can be controlled by the D2D Interface. Both regulators
(VDD and VDDX) are active and operate with full current capability.
Once entered in Normal mode, the Watchdog will operate as a simple non-window watchdog with an initial timeout (tIWDTO) to
be reset via the D2D Interface. After the initial reset, the watchdog will operate in standard window mode. See
“Window Watchdog
4.4.4
The Stop mode will allow reduced current consumption with fast startup time. In this mode, both voltage regulators (VDD and
VDDX) are active, with limited current drive capability. In this condition, the MCU is supposed to operate in Low Power mode
(STOP).
The device can enter in Stop mode by configuring the Mode Control Register (MCR) via the D2D Interface. The MCU has to enter
a Low Power mode immediately afterwards executing the STOP instruction. The Wake-up Source Register (WSR) has to be read
after a wake-up condition in order to execute a new STOP mode command. Two base clock cycles (fBASE) delay are required
between WSR read and MCR write.
While in Stop mode, the MM912_634 analog die will wake up on the following sources:
After Wake-up from the sources listed above, the device will transit to Normal mode.
Reset will wake up the device directly to Reset mode.
See
4.4.5
The Sleep mode will allow very low current consumption. In this mode, both voltage regulators (VDD and VDDX) are inactive.
The device can enter into Sleep mode by configuring the Mode Control Register (MCR) via the D2D- Interface. During Sleep
mode, all unused internal blocks are deactivated to allow the lowest possible consumption. Power consumption will decrease
further if the Cyclic Sense or Forced Wake-up feature are disabled. While in Sleep mode, the MM912_634 analog die will wake
up on the following sources:
After Wake-up from the sources listed above or a reset condition, the device will transit to Reset mode.
See
Freescale Semiconductor
Section 4.9, “Wake-up / Cyclic Sense
Section 4.9, “Wake-up / Cyclic Sense
POR - Power On Reset
LVR - Low Voltage Reset VDD
LVRX - Low Voltage Reset VDDX
WDR - Watchdog Reset
EXR - External Reset
WUR - Wake-up Sleep Reset
Lx - Wake-up (maskable with selectable cyclic sense)
Forced Wake-up (configurable timeout)
LIN Wake-up
D2D Wake-up (special command)
Lx - Wake-up (maskable with selectable cyclic sense)
Forced Wake-up (configurable timeout)
LIN Wake-up
Section 4.8,
Normal Mode
Stop Mode
Sleep Mode
To avoid any pending analog die interrupts prevent the MCU from entering MCU stop
resulting in unexpected system behavior, the analog die IRQ sources should be disabled
and the corresponding flags be cleared before entering stop.
for details.
“Resets.
for details.
for details.
MM912_634 Advance Information, Rev. 4.0
NOTE
Modes of Operation
Section 4.10,
58

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