MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 110

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Note:
When using an internal oscillator in a LIN system, it is necessary to raise the break detection threshold by one bit time. Under
the worst case timing conditions allowed in LIN, it is possible that a 0x00 data character can appear to be 10.26 bit times long at
a slave which is running 14% faster than the master. This would trigger normal break detection circuitry which is designed to
detect a 10 bit break symbol. When the LBKDE bit is set, framing errors are inhibited and the break detection threshold changes
from 10 bits to 11 bits, preventing false detection of a 0x00 data character as a LIN break symbol.
4.16.2.6
Freescale Semiconductor
Note:
98.
Offset
Reset
97.
RXEDGIF
RXINV
W
LBKDIF
RWUID
R
LBKDE
BRK13
Field
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
(98)
7
6
4
3
2
1
Setting RXINV inverts the RxD input for all cases: data bits, start and stop bits, break, and idle.
(97)
0x46
LIN Break Detect Interrupt Flag — LBKDIF is set when the LIN break detect circuitry is enabled and a LIN break character is
detected. LBKDIF is cleared by writing a “1” to it.
RxD Pin Active Edge Interrupt Flag — RXEDGIF is set when an active edge (falling if RXINV = 0, rising if RXINV=1) on the
RxD pin occurs. RXEDGIF is cleared by writing a “1” to it.
Receive Data Inversion — Setting this bit reverses the polarity of the received data input.
Receive Wake Up Idle Detect— RWUID controls whether the idle character that wakes up the receiver sets the IDLE bit.
Break Character Generation Length — BRK13 is used to select a longer transmitted break character length. Detection of a
framing error is not affected by the state of this bit.
LIN Break Detection Enable— LBKDE is used to select a longer break character detection length. While LBKDE is set, framing
error (FE) and receive data register full (RDRF) flags are prevented from setting.
R8
SCI Control Register 3 (SCIC3)
7
0
0
1
0
1
0
1
0
1
0
1
0
1
No LIN break character has been detected.
LIN break character has been detected.
No active edge on the receive pin has occurred.
An active edge on the receive pin has occurred.
Receive data not inverted
Receive data inverted
During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character.
During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character.
Break character is transmitted with length of 10 bit times (11 if M = 1)
Break character is transmitted with length of 13 bit times (14 if M = 1)
Break character detection enabled.
Break character detection disabled.
T8
6
0
Table 146. SCI Control Register 3 (SCIC3)
TXDIR
Table 145. SCIS2 Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
TXINV(99)
4
0
Description
ORIE
3
0
Serial Communication Interface (S08SCIV4)
NEIE
2
0
FEIE
1
0
Access: User read/write
PEIE
0
0
110