MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 185

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Global Address 0x3_FF06
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured
When entering background debug mode, the BDM CCR holding register is used to save the condition code register of the user’s
program. It is also used for temporary storage in the standard BDM firmware mode. The BDM CCR holding register can be written
to modify the CCR value.
4.31.3.2.2
Register Global Address 0x3_FF08
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured
Freescale Semiconductor
Special Single-Chip Mode
Reset
UNSEC
TRACE
W
R
Field
All Other Modes
3
1
Reset
W
R
BPAE
TRACE1 BDM Firmware Command is Being Executed — This bit gets set when a BDM TRACE1 firmware command is
first recognized. It will stay set until BDM firmware is exited by one of the following BDM commands: GO or GO_UNTIL(171).
Unsecure — If the device is secured this bit is only writable in special single chip mode from the BDM secure firmware. It is
in a zero state as secure mode is entered so that the secure BDM firmware lookup table is enabled and put into the memory
map overlapping the standard BDM firmware lookup table.
The secure BDM firmware lookup table verifies that the on-chip Flash is erased. This being the case, the UNSEC bit is set and
the BDM program jumps to the start of the standard BDM firmware lookup table and the secure BDM firmware lookup table is
turned off. If the erase test fails, the UNSEC bit will not be asserted.
Note: When UNSEC is set, security is off and the user can change the state of the secure bits in the on-chip Flash EEPROM.
7
0
When BDM is made active, the CPU stores the content of its CCR register in the BDMCCR
register. However, out of special single-chip reset, the BDMCCR is set to 0xD8 and not 0xD0
which is the reset value of the CCR register in this CPU mode. Out of reset in all other modes
the BDMCCR register is read zero.
BDM Program Page Index Register (BDMPPR)
0
1
0
1
Note that if the user does not change the state of the bits to “unsecured” mode, the system will be secured again when
it is next taken out of reset.After reset this bit has no meaning or effect when the security byte in the Flash EEPROM
is configured for unsecure mode.
TRACE1 command is not being executed
TRACE1 command is being executed
System is in a secured mode.
System is in a unsecured mode.
CCR7
6
0
0
7
1
0
= Unimplemented, Reserved
Table 262. BDMSTS Field Descriptions (continued)
Table 264. BDM Program Page Register (BDMPPR)
Table 263. BDM CCR Holding Register (BDMCCR)
CCR6
MM912_634 Advance Information, Rev. 4.0
6
1
0
5
0
0
CCR5
5
0
0
NOTE
4
0
0
Description
CCR4
4
1
0
BPP3
3
0
CCR3
3
1
0
BPP2
2
0
CCR2
2
0
0
BPP1
1
0
CCR1
1
0
0
BPP0
CCR0
0
0
0
0
0
185