MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 291

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The baud rate generator is activated only when the SPI is in master mode and a serial transfer is taking place. In the other cases,
the divider is disabled to decrease I
4.39.4.5
4.39.4.5.1
The SS output feature automatically drives the SS pin low during transmission to select external devices and drives it high during
idle to deselect external devices. When SS output is selected, the SS output pin is connected to the SS input pin of the external
device.
The SS output is available only in master mode during normal SPI operation by asserting SSOE and MODFEN bit as shown in
Table
The mode fault feature is disabled while SS output is enabled.
4.39.4.5.2
The bidirectional mode is selected when the SPC0 bit is set in SPI control register 2 (see
only one serial data pin for the interface with external device(s). The MSTR bit decides which pin to use. The MOSI pin becomes
the serial data I/O (MOMI) pin for the master mode, and the MISO pin becomes serial data I/O (SISO) pin for the slave mode.
The MISO pin in master mode and MOSI pin in slave mode are not used by the SPI.
The direction of each serial I/O pin depends on the BIDIROE bit. If the pin is configured as an output, serial data from the shift
register is driven out on the pin. The same pin is also the serial input to the shift register.
Freescale Semiconductor
Bidirectional Mode
390.
When SPE = 1
Normal Mode
SPC0 = 0
SPC0 = 1
The SCK is output for the master mode and input for the slave mode.
The SS is the input or output for the master mode, and it is always the input for the slave mode.
The bidirectional mode does not affect SCK and SS functions.
Special Features
For maximum allowed baud rates, please refer to the SPI Electrical Specification in the
Electricals chapter of this data sheet.
SS Output
Care must be taken when using the SS output feature in a multimaster system because the
mode fault feature is not available for detecting system errors between masters.
Bidirectional Mode (MOMI or SISO)
In bidirectional master mode, with mode fault enabled, both data pins MISO and MOSI can
be occupied by the SPI, though MOSI is normally used for transmissions in bidirectional
mode and MISO is not used by the SPI. If a mode fault occurs, the SPI is automatically
switched to slave mode. In this case MISO becomes occupied by the SPI and MOSI is not
used. This must be considered, if the MISO pin is used for another purpose.
Serial Out
Serial In
Serial Out
SPI
Serial In
SPI
DD
Table 403. Normal Mode and Bidirectional Mode
current.
Master Mode MSTR = 1
BIDIROE
MM912_634 Advance Information, Rev. 4.0
NOTE
NOTE
NOTE
MOMI
MOSI
MISO
Serial Out
Serial In
Serial Out
SPI
Serial In
SPI
Table
Slave Mode MSTR = 0
BIDIROE
403). In this mode, the SPI uses
SISO
MOSI
MISO
291

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