MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 305

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Although the protection scheme is loaded from the Flash memory at global address 0x3_FF0C during the reset sequence, it can
be changed by the user. The P-Flash protection scheme can be used by applications requiring reprogramming in single chip
mode while providing as much protection as possible if reprogramming is not required.
4.40.3.2.10
The DFPROT register defines which D-Flash sectors are protected against program and erase operations.
The (unreserved) bits of the DFPROT register are writable with the restriction that protection can be added but not removed.
Writes must increase the DPS value and the DPOPEN bit can only be written from 1 (protection disabled) to 0 (protection
enabled). If the DPOPEN bit is set, the state of the DPS bits is irrelevant.
During the reset sequence, the DFPROT register is loaded with the contents of the D-Flash protection byte in the Flash
configuration field at global address 0x3_FF0D located in P-Flash memory (see
Figure
D-Flash protection byte must be unprotected, then the D-Flash protection byte must be programmed. If a double bit fault is
detected while reading the P-Flash phrase containing the D-Flash protection byte during the reset sequence, the DPOPEN bit
will be cleared and DPS bits will be set to leave the D-Flash memory fully protected.
Trying to alter data in any protected area in the D-Flash memory will result in a protection violation error and the FPVIOL bit will
be set in the FSTAT register. Block erase of the D-Flash memory is not possible if any of the D-Flash sectors are protected.
Freescale Semiconductor
Reset
FPHS[1:0]
FPHDIS
RNV[6]
W
R
Field
4–3
6
5
428. To change the D-Flash protection that will be loaded during the reset sequence, the P-Flash sector containing the
DPOPEN
Reserved Nonvolatile Bit — The RNV bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a protected/unprotected
area in a specific region of the P-Flash memory ending with global address 0x3_FFFF.
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected/unprotected area in P-Flash
memory as shown
7
F
D-Flash Protection Register (DFPROT)
0
1
Protection/Unprotection enabled
Protection/Unprotection disabled
FPHS[1:0]
00
01
10
6
0
0
11
inTable
= Unimplemented or Reserved
Table 427. P-Flash Protection Higher Address Range
Table 428. D-Flash Protection Register (DFPROT)
427. The FPHS bits can only be written to while the FPHDIS bit is set.
Table 426. FPROT Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
0
Global Address Range
0x3_F800–0x3_FFFF
0x3_F000–0x3_FFFF
0x3_E000–0x3_FFFF
0x3_C000–0x3_FFFF
4
0
0
Description
3
F
Table
Protected Size
404) as indicated by reset condition F in
2.0 kByte
4.0 kByte
8.0 kByte
16 kByte
2
F
DPS[3:0]
F
1
0
F
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