MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 161

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.28.2.6
These registers are reserved for factory testing of the PIM module. Writing to these addresses can alter the module functionality.
Note:
4.28.2.7
Note:
Freescale Semiconductor
149.
150.
Address 0x0004-0x0009
Address 0x0124
Reset
Reset
BKPUE
PDPEE
DDRE
Field
Field
W
W
1–0
R
R
6
1
Read: Always reads 0x00
Read: Anytime.
Write: Not allowed
Write: Anytime.
Port E Data Direction— This bit determines whether the associated pin is an input or output. The enabled CPMU OSC function
connects the associated pins directly to the oscillator module. In this case the data direction bits will not change.
BKGD pin pull-up Enable—Enable pull-up devices on BKGD pin. This bit configures whether a pull-up device is activated, if the
pin is used as input. This bit has no effect if the pin is used as output. Out of reset the pull-up device is enabled.
Pull-down Port E Enable—Enable pull-down devices on all Port E input pins. This bit configures whether pull-down devices are
activated, if the pins are used as inputs. This bit has no effect if the pins are used as outputs. Out of reset the pull-down devices
are enabled. If the CPMU OSC function is active the pull-down devices are disabled. In this case the register bit will not change.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
1 Pull-up device enabled.
0 Pull-up device disabled.
1 Pull-down devices enabled.
0 Pull-down devices disabled.
PIM Reserved Registers
Pull Control Register (PUCR)
7
0
0
7
0
0
BKPUE
6
0
0
6
1
= Unimplemented or Reserved
Table 232. DDRE Register Field Descriptions
Table 235. PUCR Register Field Descriptions
Table 234. Pull Control Register (PUCR)
MM912_634 Advance Information, Rev. 4.0
Table 233. PIM Reserved Registers
5
0
0
5
0
0
4
0
0
4
0
0
Description
Description
3
0
0
3
0
0
Port Integration Module (S12IPIMV1)
2
0
0
2
0
0
Access: User read/write
PDPEE
1
0
0
1
1
Access: User read
0
0
0
0
0
0
(149)
(150)
161

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