MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 329

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.41.1.3.2
The MCU can enter a special mode (used for test and debugging purposes as well as programming the FLASH). In the D2DI the
“write-once” feature is disabled. See the MCU description for details.
4.41.2
The D2DI optionally uses 6 or 10 port pins. The functions of those pins depends on the settings in the D2DCTL0 register, when
the D2DI module is enabled.
4.41.2.1
When the D2DI is enabled this pin is the clock output. This signal is low if the initiator is disabled, in STOP mode (with D2DSWAI
asserted), otherwise it is a continuos clock. This pin may be shared with general purpose functionality if the D2DI is disabled.
4.41.2.2
When the D2DI is enabled and the interface connection width D2DCW is set to be 8-bit wide, those lines carry the data bits 7:4
acting as outputs or inputs. When they act as inputs pull-down elements are enabled. If the D2DI is disabled or if the interface
connection width is set as 4-bit wide, the pins may be shared with general purpose pin functionality.
4.41.2.3
When the D2DI is enabled those lines carry the data bits 3:0 acting as outputs or inputs. When they act as inputs pull-down
elements are enabled. If the D2DI is disabled the pins and may be shared with general purpose pin functionality.
4.41.2.4
The D2DINT is an active input interrupt input driven by the target device. The pin has an active pull-down device. If the D2DI is
disabled the pin may be shared with general purpose pin functionality.
See the port interface module (PIM) guide for details of the GPIO function.
4.41.3
4.41.3.1
The D2DI memory map is split into three sections.
See the chapter “Device Memory Map” for the register layout (distribution of these sections).
Freescale Semiconductor
1.
2.
3.
An eight-byte set of control registers
A 256 byte window for blocking transactions
A 256 byte window for non-blocking transactions
Note:
224.
225.
D2DDAT[7:0]
D2DCLK
D2DINT
Name
External Signal Description
Memory Map and Register Definition
D2DCLK
D2DDAT[7:4]
D2DDAT[3:0]
D2DINT
Memory Map
Active if in input state, only if D2DEN=1
only if D2DEN=1
D2DI in special modes
Bi-directional Data Lines
Interface Clock Signal
Primary (D2DEN=1)
Active High Interrupt
MM912_634 Advance Information, Rev. 4.0
Table 486. Signal Properties
I/O
I/O
O
I
Secondary
(D2DEN=0)
GPIO
GPIO
GPIO
Reset
0
0
driven low if in STOP mode
low if in STOP mode
Comment
Pull down
Active
Active
(224)
(225)
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