MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 303

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.40.3.2.7
The FSTAT register reports the operational status of the Flash module.
CCIF, ACCERR, and FPVIOL bits are readable and writable, MGBUSY and MGSTAT bits are readable but not writable, while
remaining bits read 0 and are not writable.
Freescale Semiconductor
Note:
209.
Reset
MGBUSY
ACCERR
W
DFDIE
SFDIE
R
FPVIOL
Field
Field
CCIF
1
0
Reset value can deviate from the value shown if a double bit fault is detected during the reset sequence (see
7
5
4
3
CCIF
Double Bit Fault Detect Interrupt Enable — The DFDIE bit controls interrupt generation when a double bit fault is detected
during a Flash block read operation.
Single Bit Fault Detect Interrupt Enable — The SFDIE bit controls interrupt generation when a single bit fault is detected
during a Flash block read operation.
7
1
Command Complete Interrupt Flag — The CCIF flag indicates that a Flash command has completed. The CCIF flag is
cleared by writing a 1 to CCIF to launch a command and CCIF will stay low until command completion or command violation.
Flash Access Error Flag — The ACCERR bit indicates an illegal access has occurred to the Flash memory caused by either
a violation of the command write sequence (see
set, the CCIF flag cannot be cleared to launch a command. The ACCERR bit is cleared by writing a 1 to ACCERR. Writing
a 0 to the ACCERR bit has no effect on ACCERR.
Flash Protection Violation Flag —The FPVIOL bit indicates an attempt was made to program or erase an address in a
protected area of P-Flash or D-Flash memory during a command write sequence. The FPVIOL bit is cleared by writing a 1
to FPVIOL. Writing a 0 to the FPVIOL bit has no effect on FPVIOL. While FPVIOL is set, it is not possible to launch a
command or start a command write sequence.
Memory Controller Busy Flag — The MGBUSY flag reflects the active state of the Memory Controller
Flash Status Register (FSTAT)
0
1
0
1
0
1
0
1
0
1
0
1
DFDIF interrupt disabled
An interrupt will be requested whenever the DFDIF flag is set (see
SFDIF interrupt disabled whenever the SFDIF flag is set (see
An interrupt will be requested whenever the SFDIF flag is set (see
Flash command in progress
Flash command has completed
No access error detected
Access error detected
No protection violation detected
Protection violation detected
Memory Controller is idle
Memory Controller is busy executing a Flash command (CCIF = 0)
6
0
0
= Unimplemented or Reserved
Table 422. Flash Status Register (FSTAT)
Table 421. FERCNFG Field Descriptions
ACCERR
Table 423. FSTAT Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
FPVIOL
Section
4
0
Description
Description
4.40.4.3.2) or issuing an illegal Flash command. While ACCERR is
MGBUSY
3
0
Section
Section
Section
4.40.3.2.8)
RSVD
4.40.3.2.8)
2
0
4.40.3.2.8)
0
(209)
Section
1
MGSTAT[1:0]
.
4.40.6).
0
(209)
0
303