MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 263

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.38.3.2.20
This register configures the external oscillator (OSCLCP).
Read: Anytime
Write: Anytime if PROT=0 (CPMUPROT register) and PLLSEL=1 (CPMUCLKS register). Else write has no effect.
4.38.3.2.21
This register protects the following clock configuration registers from accidental overwrite:
CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL, CPMUIRCTRIMH/L and CPMUOSC
Freescale Semiconductor
0x02FA
OSCPINS_EN
Reset
W
R
OSCFILT
OSCBW
OSCE
Field
4-0
7
6
5
OSCE
7
0
S12CPMU Oscillator Register (CPMUOSC)
Write to this register clears the LOCK and UPOSC status bits.
If the chosen VCOCLK-to-OSCCLK ratio divided by two ((f
number, the filter can not be used and the OSCFILT[4:0] bits must be set to 0.
The frequency modulation (FM1 and FM0) can not be used if the Adaptive Oscillator Filter
is enabled.
S12CPMU Protection Register (CPMUPROT)
Oscillator Enable Bit — This bit enables the external oscillator (OSCLCP). The UPOSC status bit in the CPMUFLG
register indicates when the oscillation is stable and OSCCLK can be selected as Bus Clock or source of the COP or RTI.
A loss of oscillation will lead to a clock monitor reset.
Note: When starting up the external oscillator (either by programming OSCE bit to 1 or on exit from Full Stop Mode with
Oscillator Filter Bandwidth Bit — If the VCOCLK frequency exceeds 25 MHz wide bandwidth must be selected. The
Oscillator Filter is described in more detail at
Oscillator Pins EXTAL and XTAL Enable Bit
If OSCE=1 this read-only bit is set. It can only be cleared with the next reset.
Enabling the external oscillator reserves the EXTAL and XTAL pins exclusively for oscillator application.
Oscillator Filter Bits — When using the oscillator a noise filter can be enabled, which filters noise from the incoming
external oscillator clock and detects if the external oscillator clock is qualified or not (quality status shown by bit UPOSC).
The VCOCLK-to-OSCCLK ratio divided by two ((f
OSCFILT[4:0] bits to enable the Adaptive Oscillator Filter.
0x0000 Adaptive Oscillator Filter disabled.
else Adaptive Oscillator Filter enabled]
0
1
REFDIV.
0
1
0
1
OSCE bit already 1) the software must wait for a minimum time equivalent to the startup-time of the external
oscillator t
External oscillator is disabled. REFCLK for PLL is IRCCLK.
External oscillator is enabled.Clock monitor is enabled. REFCLK for PLL is external oscillator clock divided by
Oscillator filter bandwidth is narrow (window for expected OSCCLK edge is one VCOCLK cycle).
Oscillator filter bandwidth is wide (window for expected OSCCLK edge is three VCOCLK cycles).
EXTAL and XTAL pins are not reserved for oscillator.
EXTAL and XTAL pins exclusively reserved for oscillator.
OSCBW
6
0
UPOSC
Table 377. S12CPMU Oscillator Register (CPMUOSC)
before entering Pseudo Stop Mode.
OSCPINS_EN
Table 378. CPMUOSC Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
Section 4.38.4.5.2, “The Adaptive Oscillator Filter
NOTE
NOTE
NOTE
4
0
VCO
/ f
Description
OSC
)/2) must be an integer value. This value must be written to the
3
0
VCO
/ f
OSC
OSCFILT[4:0]
)/2) is not an integer
2
0
1
0
0
0
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