MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 138

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.20.4.2.4
4.20.4.2.5
4.20.5
4.20.5.1
The following analog Channels are routed to the analog multiplexer:
Freescale Semiconductor
Note:
Note:
131.
132.
Offset
Offset
Reset
Reset
W
W
15-0 CCx
R
R
ADRx
Field
(132)
Field
(131)
15-6
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
0x84 (0x84 and 0x85 for 8-Bit access)
0x86+x (0x86 and 0x87 for 8-Bit access)
CC15 CC14
15
15
0
0
Functional Description
Analog Channel Definitions
Conversion Complete Flag - Indicates the conversion being complete for channel x. Read operation only.16-bit read
recommended. 8-Bit read will return the current status, no latching will be performed.
ADC - Channel X left adjusted Result Register. Reading the register will clear the corresponding CCx register in the ACCSR
register. 16-bit read recommended. 8-Bit read: Reading the low byte will latch the high byte for the next read, reading the
high byte will clear the cc flag.
ADC Conversion Complete Status Register (ACCSR)
ADC Data Result Register x (ADRx)
Channel
14
14
0
0
0
1
2
3
4
5
6
13
13
0
0
0
Table 205. ADC Conversion Complete Status Register (ACCSR)
AD0 - PTB0 Analog Input
AD1 - PTB1 Analog Input
AD2 - PTB2 Analog Input
AD3 - L0 Analog Input
AD4 - L1 Analog Input
AD5 - L2 Analog Input
AD6 - L3 Analog Input
CC12
12
12
0
0
Table 206. ACCSR - Register Field Descriptions
Table 207. ADC Data Result Register x (ADRx)
Table 208. ADRx - Register Field Descriptions
CC11
11
11
0
0
ADRx
MM912_634 Advance Information, Rev. 4.0
CC10
Table 209. Analog Channels
10
10
0
0
CC9
Description
9
0
9
0
CC8
8
8
0
0
Description
Description
CC7
7
0
7
0
CC6
6
0
6
0
CC5
5
0
5
0
0
CC4
4
0
4
0
0
CC3
3
0
3
0
0
AD0
AD1
AD2
AD3
AD4
AD5
AD6
CC2
2
0
2
0
0
Access: User read
Access: User read
CC1
1
0
1
0
0
CC0
0
0
0
0
0
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