MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 31

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.6.2.2
3.6.2.2.1
With each transition of the feedback clock, the deviation from the reference clock is measured and input voltage to the VCO is
adjusted accordingly.The adjustment is done continuously with no abrupt changes in the VCOCLK frequency. Noise, voltage,
temperature, and other factors cause slight variations in the control loop resulting in a clock jitter. This jitter affects the real
minimum and maximum clock periods, as illustrated in
The relative deviation of t
periods (N). Jitter is defined as:
Freescale Semiconductor
Data retention at an average junction temperature of T
10,000 program/erase cycles
Program Flash number of program/erase cycles
(-40 C  T
Data retention at an average junction temperature of T
50,000 program/erase cycles
Data retention at an average junction temperature of T
10,000 program/erase cycles
Data retention at an average junction temperature of T
than 100 program/erase cycles
Data Flash number of program/erase cycles (-40 C  T
Note:
42.
43.
44.
T
Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to 25 C
Spec table quotes typical endurance evaluated at 25 C for this product family. For additional information on how Freescale defines
using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please refer to Engineering
Bulletin EB618
Typical Endurance, please refer to Engineering Bulletin EB619.
JAVG
J
 150 C
0
does not exceed 85 C in a typical temperature profile over the lifetime of a consumer, industrial or automotive application.
Phase Locked Loop
Jitter Definitions
t
MIN1
t
NOM
t
MAX1
NOM
is at its maximum for one clock period, and decreases towards zero for larger number of clock
1
Rating
J N
 
Table 40. NVM Reliability Characteristics
MM912_634 Advance Information, Rev. 4.0
=
2
max 1
Figure 10. Jitter Definitions
JAVG
JAVG
JAVG
JAVG
J
 150 C
Program Flash Arrays
= 85 C
= 85 C
= 85 C



= 85 C
Figure
Data Flash Array
–
t
t
---------------------- -
N t
MINN
max
(42)
(42)
(42)
(42)
t
MAXN
10.

after up to
after up to
after up to
after less
nom
 
N
3
,
1
–
---------------------- -
N t
t
min
t
t
t
t
Symbol
NVMRET
NVMRET
NVMRET
NVMRET

n
n
FLPE
FLPE
nom
 
N



Min
10K
50K
20
10
20
5
N-1
100K
500K
100
100
100
100
Electrical Characteristics
Typ
(43)
(43)
(43)
(43)
(44)
(44)
Max
—
—
—
—
—
—
N
Cycles
Cycles
Years
Years
Years
Years
Unit
31