MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 169

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.29.3.2.3
Read: Anytime.
Write: Anytime.
The IFRON bit of the MMCCTL1 register is used to make IFR sector visible in the memory map.
The RAMON and ROMON bits of the MMCCTL1 register are used to make Scratch-RAM and ROM visible in the memory map.
Freescale Semiconductor
Address: 0x0013
Reset
ROMON
RAMON
W
W
R
R
IFRON
Field
2
1
0
MOVB
LDY
FTMRC Scratch-RAM visible in the memory map
Write: Anytime
This bit is used to make the FTMRC Scratch-RAM visible in the global memory map.
FTMRC ROM visible in the memory map
Write: Anytime
This bit is used to make the FTMRC ROM visible in the global memory map.
IFR visible in the memory map
Write: Anytime
This bit is used to make the IFR sector visible in the global memory map.
7
0
0
0
MMC Control Register (MMCCTL1)
0
1
0
1
0
1
Example 1. This example demonstrates usage of the Direct Addressing Mode
#$80,DIRECT
<$00
Not visible in the global memory map.
Visible in the global memory map and accessible via PPAGE 0x01
Not visible in the global memory map.
Visible in the global memory map and accessible via PPAGE 0x01
Not visible in the global memory map.
Visible in the global memory map and accessible via PPAGE 0x01
6
0
0
0
= Unimplemented or Reserved
Table 250. MMC Control Register (MMCCTL1)
Table 251. MODE Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
0
0
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
;many cases assemblers are “direct page aware” and can
;automatically select direct mode.
4
0
0
0
Description
3
0
0
0
RAMON
2
0
0
ROMON
1
0
0
IFRON
IFRON
0
0
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