MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 27

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.6.2
3.6.2.1
3.6.2.1.1
The time base for all NVM program or erase operations is derived from the bus clock using the FCLKDIV register. The frequency
of this derived clock must be set within the limits specified as f
frequency and will not prevent program or erase operations at frequencies above or below the specified minimum. When
attempting to program or erase the NVM module at a lower frequency, a full program or erase transition is not assured.
The following sections provide equations which can be used to determine the time required to execute specific flash commands.
All timing parameters are a function of the bus clock frequency, f
NVM operating frequency, f
3.6.2.1.1.1
The time required to perform a blank check on all blocks is dependent on the location of the first non-blank word starting at relative
address zero. It takes one bus cycle per phrase to verify plus a setup of the command. Assuming that no non-blank location is
found, then the time to erase verify all blocks is given by:
3.6.2.1.1.2
The time required to perform a blank check is dependent on the location of the first non-blank word starting at relative address
zero. It takes one bus cycle per phrase to verify plus a setup of the command.
Assuming that no non-blank location is found, then the time to erase verify a P-Flash block is given by:
Assuming that no non-blank location is found, then the time to erase verify a D-Flash block is given by:
Freescale Semiconductor
GPIO Digital Frequency
Propagation Delay - Rising Edge
Rise Time - Rising Edge
Propagation Delay - Falling Edge
Rise Time - Falling Edge
Note:
ADC Operating Frequency
Conversion Time (from ACCR write to CC Flag)
Sample Frequency Channel 14 (Bandgap)
Note:
34.
35.
36.
t
t
check
pcheck
Guaranteed by design.
Load PTBx = 100 pF.
Guaranteed by design.
=
=
Dynamic Electrical Characteristics MCU Die
19200
NVM
17200
Timing Parameters
Erase Verify All Blocks (Blank Check) (FCMD=0x01)
Erase Verify Block (Blank Check) (FCMD=0x02)
Table 37. Dynamic Electrical Characteristics - General Purpose I/O - PTB[0…2]
Table 38. Dynamic Electrical Characteristics - Analog Digital Converter - ADC

(34)
(34)

------------------- -
f
NVMBUS
------------------- -
f
NVMBUS
1
NVMOP
1
(35)
(34)
Ratings
Ratings
. A summary of key timing parameters can be found in
MM912_634 Advance Information, Rev. 4.0
NVMOP
NVMBUS
. The NVM module does not have any means to monitor the
Symbol
Symbol
. All program and erase times are also a function of the
t
f
t
t
CONV
t
t
f
f
CH14
RISE
FALL
PDR
PDF
ADC
PTB
Min
Min
1.6
-
-
-
-
-
-
Table
.
Typ
Typ
2.0
26
-
-
-
-
-
-
Electrical Characteristics
(36)
(34)
Max
17.5
17.5
Max
2.4
2.5
10
20
20
MHz
MHz
Unit
Unit
kHz
clk
ns
ns
ns
ns
27