MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 324

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.40.4.6
The Flash module can generate an interrupt when a Flash command operation has completed or when a Flash command
operation has detected an ECC fault.
4.40.4.6.1
The Flash module uses the CCIF flag in combination with the CCIE interrupt enable bit to generate the Flash command interrupt
request. The Flash module uses the DFDIF and SFDIF flags in combination with the DFDIE and SFDIE interrupt enable bits to
generate the Flash error interrupt request. For a detailed description of the register bits involved, refer to
“Flash Configuration Register
Section 4.40.3.2.7, “Flash Status Register
The logic used for generating the Flash module interrupts is shown in
4.40.4.7
If a Flash command is active (CCIF = 0) when the MCU requests stop mode, the current Flash operation will be completed before
the CPU is allowed to enter stop mode.
4.40.5
The Flash module provides security information to the MCU. The Flash security state is defined by the SEC bits of the FSEC
register (see
the Flash configuration field at global address 0x3_FF0F. The security state out of reset can be permanently changed by
programming the security byte assuming that the MCU is starting from a mode where the necessary P-Flash erase and program
commands are available and that the upper region of the P-Flash is unprotected. If the Flash security byte is successfully
programmed, its new value will take affect after the next MCU reset.
The following subsections describe these security-related subjects:
Freescale Semiconductor
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•
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Flash Command Complete
ECC Double Bit Fault on Flash Read
ECC Single Bit Fault on Flash Read
Unsecuring the MCU using Backdoor Key Access
Unsecuring the MCU in Special Single Chip Mode using BDM
Mode and Security Effects on Flash Command Availability
Table
Security
Interrupts
Stop Mode
Vector addresses and their relative interrupt priority are determined at the MCU level.
Description of Flash Interrupt Operation
414). During reset, the Flash module initializes the FSEC register using data read from the security byte of
Interrupt Source
DFDIE
DFDIF
SFDIE
SFDIF
CCIE
CCIF
(FCNFG)”,
Figure 115. Flash Module Interrupts Implementation
Section 4.40.3.2.6, “Flash Error Configuration Register
(FSTAT)”, and
MM912_634 Advance Information, Rev. 4.0
Table 483. Flash Interrupt Sources
(FERSTAT register)
(FERSTAT register)
(FSTAT register)
Interrupt Flag
Section 4.40.3.2.8, “Flash Error Status Register
DFDIF
SFDIF
CCIF
NOTE
Figure
Flash Command Interrupt Request
Flash Error Interrupt Request
(FERCNFG register)
(FERCNFG register)
115.
(FCNFG register)
Local Enable
DFDIE
SFDIE
CCIE
(FERCNFG)”,
Global (CCR) Mask
Section 4.40.3.2.5,
(FERSTAT)”.
I Bit
I Bit
I Bit
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