MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 186

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.31.3.3
The family ID is an 8-bit value located in the BDM ROM in active BDM (at global address: 0x3_FF0F). The read-only value is a
unique family ID which is 0xC2 for devices with an HCS12S core.
4.31.4
The BDM receives and executes commands from a host via a single wire serial interface. There are two types of BDM commands:
hardware and firmware commands.
Hardware commands are used to read and write target system memory locations and to enter active background debug mode,
see
Firmware commands are used to read and write CPU resources and to exit from active background debug mode, see
Section 4.31.4.4, “Standard BDM Firmware
register (X), Y index register (Y), stack pointer (SP), and program counter (PC).
Hardware commands can be executed at any time and in any mode excluding a few exceptions as highlighted (see
Section 4.31.4.3, “BDM Hardware
commands can only be executed when the system is not secure and is in active background debug mode (BDM).
4.31.4.1
If the user resets into special single chip mode with the system secured, a secured mode BDM firmware lookup table is brought
into the map overlapping a portion of the standard BDM firmware lookup table. The secure BDM firmware verifies that the on-chip
Flash EEPROM are erased. This being the case, the UNSEC and ENBDM bit will get set. The BDM program jumps to the start
of the standard BDM firmware and the secured mode BDM firmware is turned off and all BDM commands are allowed. If the Flash
do not verify as erased, the BDM firmware sets the ENBDM bit, without asserting UNSEC, and the firmware enters a loop. This
causes the BDM hardware commands to become enabled, but does not enable the firmware commands. This allows the BDM
hardware to be used to erase the Flash.
BDM operation is not possible in any other mode than special single chip mode when the device is secured. The device can only
be unsecured via BDM serial interface in special single chip mode. For more information regarding security, please see the
S12S_9SEC Block Guide.
4.31.4.2
The system must be in active BDM to execute standard BDM firmware commands. BDM can be activated only after being
enabled. BDM is enabled by setting the ENBDM bit in the BDM status (BDMSTS) register. The ENBDM bit is set by writing to the
BDM status (BDMSTS) register, via the single-wire interface, using a hardware command such as WRITE_BD_BYTE.
After being enabled, BDM is activated by one of the following
When BDM is activated, the CPU finishes executing the current instruction and then begins executing the firmware in the
standard BDM firmware lookup table. When BDM is activated by a breakpoint, the type of breakpoint used determines if BDM
becomes active before or after execution of the next instruction.
Note:
Freescale Semiconductor
166.
167.
BPP[3:0]
Section 4.31.4.3, “BDM Hardware
•
•
•
BPAE
Field
3–0
BDM is enabled and active immediately out of special single-chip reset.
This method is provided by the S12S_DBG module.
7
Hardware BACKGROUND command
CPU BGND instruction
Breakpoint force or tag mechanism
Functional Description
BDM Program Page Access Enable Bit — BPAE enables program page access for BDM hardware and firmware read/write
instructions. The BDM hardware commands used to access the BDM registers (READ_BD and WRITE_BD) can not be used
for global accesses even if the BGAE bit is set.
BDM Program Page Index Bits 3–0 — These bits define the selected program page. For more detailed information regarding
the program page window scheme, please refer to the S12S_MMC Block Guide.
Family ID Assignment
Security
Enabling and Activating BDM
0
1
BDM Program Paging disabled
BDM Program Paging enabled
Commands”) and in secure mode (see
Commands”. Target system memory includes all memory that is accessible by the CPU.
Table 265. BDMPPR Field Descriptions
Commands”. The CPU resources referred to are the accumulator (D), X index
(167)
MM912_634 Advance Information, Rev. 4.0
(166)
:
Description
Section 4.31.4.1,
“Security”). BDM firmware
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