MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 130

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.19.4
4.19.4.1
This section provides a complete functional description of the timer TIM16B4C block. Refer to the detailed timer block diagram
in
Freescale Semiconductor
Offset
Note:
Note:
126.
125.
Offset
Figure 34
Reset
Reset
Reset
Reset
W
W
tcn[15-0]
R
R
W
W
R
R
Field
(126)
15-0
(125)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
0xD4, 0xD5
0xD2, 0xD3
as necessary.
Functional Description
tc3_15
tc2_15
tc3_7
tc2_7
General
15
16 Timer Input Capture/Output Compare Registers
15
0
7
0
0
7
0
TRead anytime. Write anytime for output compare function. Writes to these registers have
no effect during input capture.
Depending on the TIOS bit for the corresponding channel, these registers are used to latch
the value of the free-running counter when a defined transition is sensed by the
corresponding input capture edge detector or to trigger an output action for output compare.
Read/Write access in byte mode for high byte should takes place before low byte otherwise
it will give a different result.
Table 193. Timer Input Capture/Output Compare Register 2(TC2)
Table 194. Timer Input Capture/Output Compare Register 3(TC3)
tc3_14
tc2_14
tc3_6
tc2_6
14
14
0
6
0
0
6
0
Table 195. TCn - Register Field Descriptions
tc3_13
tc2_13
tc3_5
MM912_634 Advance Information, Rev. 4.0
tc2_5
13
13
0
5
0
0
5
0
tc3_12
tc2_12
tc3_4
tc2_4
12
NOTE
12
0
4
0
0
4
0
Description
tc3_11
tc2_11
tc3_3
tc2_3
11
11
0
3
0
0
3
0
Access: User read(anytime)/write (special mode)
Access: User read(anytime)/write (special mode)
Basic Timer Module - TIM (TIM16B4C)
tc2_10
tc3_10
tc3_2
tc2_2
10
10
0
2
0
0
2
0
tc2_9
tc2_1
tc3_9
tc3_1
9
0
1
0
9
0
1
0
tc2_8
tc2_0
tc3_8
tc3_0
8
0
0
0
8
0
0
0
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