MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 150

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.27
4.27.1
The MC9S12I64 micro controller implemented in the MM912_634 is designed as counter part to an analog die,
and is not being offered as a standalone MCU.
The MC9S12I64 device contains a S12 Central Processing Unit (CPU), offers 64kB of Flash memory and 6.0 kB of system
SRAM, up to eight general purpose I/Os, an on-chip oscillator and clock multiplier, one Serial Peripheral Interface (SPI), an
interrupt module and debug capabilities via the on-chip debug module (DBG) in combination with the Background Debug Mode
(BDM) interface. Additionally there is a die-to-die initiator (D2DI) which represents the communication interface to the companion
(analog) die.
4.27.2
This section describes the key features of the MC9S12I64 micro controller unit.
4.27.2.1
On-chip modules available within the family include the following features:
4.27.3
The following sections provide more details of the modules implemented on the MC9S12I64.
4.27.3.1
S12 CPU is a high-speed 16-bit processing unit:
4.27.3.2
On-chip flash memory on the MC9S12I64 features the following:
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S12 CPU core (CPU12_V1)
4.0 kbyte on-chip data flash with ECC
6.0 kbyte on-chip SRAM
Phase locked loop (IPLL) frequency multiplier with internal filter
4–16 MHz amplitude controlled Pierce oscillator
1.0 MHz internal RC oscillator
One serial peripheral interface (SPI) module
On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
Die to Die Initiator (D2DI)
Full 16-bit data paths supports efficient arithmetic operation and high-speed math execution
Includes many single-byte instructions. This allows much more efficient use of ROM space.
Extensive set of indexed addressing capabilities, including:
— Using the stack pointer as an indexing register in all indexed operations
— Using the program counter as an indexing register in all but auto increment/decrement mode
— Accumulator offsets using A, B, or D accumulators
— Automatic index pre-decrement, pre-increment, post-decrement, and post-increment (by –8 to +8)
— 32 data bits plus 7 syndrome ECC (Error Correction Code) bits allow single bit error correction and double fault
— Erase sector size 512 bytes
— Automated program and erase algorithm
— User margin level setting for reads
— Protection scheme to prevent accidental program or erase
Kbyte on-chip flash with ECC
kbyte of program flash memory
MM912_634 -
detection
Introduction
Features
Module Features
Chip-Level Features
S12 16-Bit Central Processor Unit (CPU)
On-Chip Flash with ECC
MCU Die Overview
MM912_634 Advance Information, Rev. 4.0
MM912_634 - MCU Die Overview
MCU
ANALOG
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