MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 69

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.8
To protect the system during critical events, the MM912_634 analog die will drive the RESET_A pin low during the
presence of the reset condition. In addition, the RESET_A pin is monitored for external reset events. To match the
MCU, the RESET_A pin is based on the VDDX voltage level.
After an internal reset condition has gone, the RESET_A will stay low for an additional time t
released. Entering reset mode will cause all MM912_634 analog die registers to be initialized to their RESET default. The only
registers with valid information are the Reset Status Register (RSR) and the Wake-up Source Register (WUS).
4.8.1
In the MM912_634 six reset sources exist.
4.8.1.1
To indicate the device power supply (VS1) was below VPOR or the MM912_634 analog die was powered up, the POR condition
is set. See
4.8.1.2
With the VDD voltage regulator output voltage falling below VLVR, the Low Voltage Reset condition becomes present. As the
VDD Regulator is shutdown once a LVRX condition is detected, The actual cause could be also a low voltage condition at the
VDDX regulator. See
4.8.1.3
With the VDDX voltage regulator output voltage falling below VLVRX, the Low Voltage Reset condition becomes present. See
Section 4.5, “Power
4.8.1.4
While in Sleep mode, any active wake-up event will cause a MM912_634 analog die transition from Sleep to Reset Mode. To
determine the wake-up source, refer to
4.8.1.5
Any low level voltage at the RESET_A pin with a duration > tRSTDF will issue an External Reset event. This reset source is also
active in Stop mode.
4.8.1.6
Any incorrect serving if the MM912_634 analog die Watchdog will result in a Watchdog Reset. Please refer to the
“Window Watchdog
4.8.2
4.8.2.1
Freescale Semiconductor
Note:
Offset
67.
W
R
(67)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
0x15
Section 4.4, “Modes of
Resets
Reset Sources
Register Definition
POR - Analog Die Power On Reset
LVR - Low Voltage Reset - VDD
LVRX - Low Voltage Reset - VDDX
WUR - Wake-up Reset
EXR - External Reset
WDR - Watchdog Reset
Reset Status Register (RSR)
7
0
for details.
Supply.
Section 4.5, “Power
6
0
Operation.
Section 4.9, “Wake-up / Cyclic
Supply.
Table 92. Reset Status Register (RSR)
WDR
MM912_634 Advance Information, Rev. 4.0
5
EXR
4
Sense.
WUR
3
LVRX
2
RST
before being
LVR
1
Access: User read
Section 4.10,
MCU
POR
0
Resets
ANALOG
69

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