MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 174

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.29.5
Each memory can be implemented in its maximum allowed size. But some devices have been defined for smaller sizes, which
means less implemented pages. All non implemented pages are called unimplemented areas.
4.29.5.0.1
The global memory spaces reserved for the internal resources (RAM, D-Flash, and P-Flash) are not determined by the MMC
module. Size of the individual internal resources are however fixed in the design of the device cannot be changed by the user.
Please refer to the SoC Guide for further details.
resources. Please note that the memory spaces have fixed top addresses.
In single-chip modes accesses by the CPU12 (except for firmware commands) to any of the unimplemented areas (see
Figure
data will be undefined.
No misaligned word access from the BDM module will occur; these accesses are blocked in the BDM module (Refer to BDM
Block Guide).
Freescale Semiconductor
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53) will result in an illegal access reset (system reset). BDM accesses to the unimplemented areas are allowed but the
Note:
158.
159.
Registers has a fixed size of 1.0 kB, accessible via xbus0.
SRAM has a maximum size of 11 kB, accessible via xbus0.
D-Flash has a fixed size of 4.0 kB accessible via xbus0.
P-Flash has a maximum size of 224 kB, accessible via xbus0.
NVM resources (IFR, Scratch-RAM, ROM) including D-Flash have maximum size of 16 kB (PPAGE 0x01). These
resources are visible on the memory map by enabling the appropriate bits on MMCCTL1 register (see
(if MMCCTL1.ROMON == 1’b1)
(if MMCCTL1.RAMON == 1’b1)
(if MMCCTL1.IFRON == 1’b1)
RAMSIZE is the hexadecimal value of RAM SIZE in bytes
FLASHSIZE is the hexadecimal value of FLASH SIZE in bytes
Implemented Memory in the System Memory Architecture
FTMRC Scratch-RAM
Internal Resource
Implemented Memory Map
FTMRC ROM
System RAM
FTMRC IFR
Registers
D-Flash
P-Flash
Table 254. Global Implemented Memory Space
MM912_634 Advance Information, Rev. 4.0
0x4_0000 minus FLASHSIZE
Figure 53
0x0_4000 minus RAMSIZE
0x0_8000 minus ROMSIZE
Bottom Address
RAM_LOW =
PF_LOW =
0x0_0000
0x0_4000
0x0_4400
0x0_5800
and
Table 254
(158)
show the memory spaces occupied by the on-chip
(159)
0x0_5800 plus SCR-RAMSIZE
Top Address
0x0_3FFF
0x0_7FFF
0x3_FFFF
0x0_03FF
0x0_43FF
0x0_53FF
Figure
250)
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