MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 155

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.27.8
Consult the S12 CPU manual and the S12SINT section for information on exception processing.
4.27.8.1
Table 224
Management Unit
4.27.8.2
Table 225
(S12SINTV1)”) provides an interrupt vector base register (IVBR) to relocate the vectors.
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Vector Address
Vector base + $DA
Vector base + $CA
Vector base + $BC
Vector base + $EE
Vector base + $D8
Vector base + $D6
Vector base + $C8
Vector base + $C6
Vector base + $C4
Vector base + $BA
Vector base + $B8
Vector base + $B6
Vector base + $8C
Vector base + $8A
Vector base + $F8
Vector base + $88
Vector base + $82
Vector base+ $F6
Vector base+ $F4
Vector base+ $F2
Vector base+ $F0
lists all Reset sources and the vector locations. Resets are explained in detail in the
lists all interrupt sources and vectors in the default order of priority. The interrupt module (see
to
to
to
to
to
Vector Address
Resets and Interrupts
Resets
Interrupt Vectors
$FFFE
$FFFE
$FFFE
$FFFE
$FFFC
$FFFA
(144)
(S12CPMU)”.
Unimplemented instruction trap
D2DI External Error Interrupt
Low-voltage interrupt (LVI)
Oscillator status interrupt
Table 225. Interrupt Vector Locations (Sheet 1 of 2)
Table 224. Reset Sources and Vector Locations
RTI timeout interrupt
D2DI Error Interrupt
Interrupt Source
FLASH command
PLL lock interrupt
FLASH error
Low Voltage Reset (LVR)
Power-On Reset (POR)
Illegal Address Reset
COP watchdog reset
External pin RESET
MM912_634 Advance Information, Rev. 4.0
Clock monitor reset
SWI
SPI
Reset Source
Mask
None
None
CCR
X Bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
Reserved
Reserved
Reserved
Reserved
Reserved
Mask
None
None
None
None
None
None
CCR
FERCNFG (SFDIE, DFDIE)
SPICR1 (SPIE, SPTIE)
CPMUINT (LOCKIE)
CPMUINT (OSCIE)
CPMUCTRL (LVIE)
OSCE Bit in CPMUOSC register
D2DCTL (D2DIE)
CPMUINT (RTIE)
CR[2:0] in CPMUCOP register
FCNFG (CCIE)
Local Enable
4.38, “S12 Clock, Reset and Power
MM912_634 - MCU Die Overview
None
None
None
Local Enable
None
None
None
None
4.30, “Interrupt Module
from STOP
Wake-up
Yes
Yes
No
No
No
No
No
No
-
-
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