MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 279

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.39.3.2.3
Read: Anytime
Write: Anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
Freescale Semiconductor
Reset
SPPR[2:0]
SPR[2:0]
W
SPPR2
R
Field
6–4
2–0
0
0
0
0
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
these bits will abort a transmission in progress and force the SPI system into idle state.
Bidirectional
Bidirectional
7
0
0
Pin Mode
SPI Baud Rate Register (SPIBR)
For maximum allowed baud rates, please refer to the SPI Electrical Specification in the
Electricals chapter of this data sheet.
Normal
Normal
SPPR1
0
0
0
0
SPPR2
Table 396. Example SPI Baud Rate Selection (25 MHz us Clock)
6
0
SPC0
SPPR0
0
1
0
1
Baud Rate = BusClock / BaudRateDivisor
0
0
0
0
BaudRateDivisor = (SPPR + 1)  2
= Unimplemented or Reserved
Table 393. Bidirectional Pin Configurations
Table 394. SPI Baud Rate Register (SPIBR)
BIDIROE
SPPR1
Table 395. SPIBR Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
X
X
0
1
0
1
SPR2
0
0
0
0
Master Mode of Operation
Slave Mode of Operation
SPPR0
MISO not used by SPI
NOTE
4
0
SPR1
0
0
1
1
Slave Out
Master In
Slave I/O
Slave In
Description
MISO
(SPR + 1)
SPR0
3
0
0
0
1
0
1
Baud Rate
SPR2
MOSI not used by SPI
Divisor
2
0
Table
16
2
4
8
Table
Master Out
Master I/O
Master In
Slave In
MOSI
396. In master mode, a change of
396. In master mode, a change
SPR1
1
0
1.5625 Mbit/s
3.125 Mbit/s
Baud Rate
12.5 Mbit/s
6.25 Mbit/s
SPR0
Eqn. 103
Eqn. 104
0
0
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