MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 332

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.41.3.5
This register reflects the status of the D2DI transactions.
4.41.3.6
This register holds the status of the external interrupt pin and an indicator about the D2DI transaction status.
Freescale Semiconductor
ACKERF
TIMOUT
Reset
CNCLF
TERRF
ERRIF
TIMEF
PARF
PAR1
PAR0
Field
Field
Offset 0x2
W
R
6:4
3:0
7
6
5
4
3
2
1
0
Reserved, should be written to 0 to ensure compatibility with future versions of this interface.
Timeout Setting — Defines the number of D2DCLK cycles to wait after the last transaction cycle until a timeout is asserted. In
case of a timeout the TIMEF flag in the D2DSTAT0 register will be set.
These bits are write-once in normal modes and can always be written in special modes.
D2DI error interrupt flag — This status bit indicates that the D2D initiator has detected an error condition (summary of the
following five flags).This interrupt is not locally maskable. Write a 1 to clear the flag. Writing a 0 has no effect.
Acknowledge Error Flag— This read-only flag indicates that in the acknowledge cycle not all data inputs are sampled high,
indicating a potential broken wire. This flag is cleared when the ERRIF bit is cleared by writing a 1 to the ERRIF bit.
CNCLF — This read-only flag indicates the initiator has canceled a transaction and replaced it by an IDLE command due to a
pending error flag (ERRIF). This flag is cleared when the ERRIF bit is cleared by writing a 1 to the ERRIF bit.
Time Out Error Flag — This read-only flag indicates the initiator has detected a time-out error. This flag is cleared when the ERRIF
bit is cleared by writing a 1 to the ERRIF bit.
Transaction Error Flag — This read-only flag indicates the initiator has detected the error signal during the acknowledge cycle of
the transaction. This flag is cleared when the ERRIF bit is cleared by writing a 1 to the ERRIF bit.
Parity Error Flag — This read-only flag indicates the initiator has detected a parity error. Parity bits[1:0] contain further information.
This flag is cleared when the ERRIF bit is cleared by writing a 1 to the ERRIF bit.
Parity Bit — P[1] as received by the D2DI
Parity Bit — P[0] as received by the D2DI
ERRIF
0000: The acknowledge is expected directly after the last transfer, i.e. the target must not insert a wait cycle.
0001 - 1111: The target may insert up to TIMOUT wait states before acknowledging a transaction until a timeout is asserted
0
1
D2DI Status Register 0 (D2DSTAT0)
D2DI Status Register 1 (D2DSTAT1)
7
0
“Write-once“ means that after writing D2DCNTL0.D2DEN=1 the write accesses to these bits
have no effect.
D2DI has not detected an error during a transaction.
D2DI has detected an error during a transaction.
ACKERF
6
0
Table 493. D2DI Status Register 0 Field Descriptions
Table 491. D2DCTL1 Register Field Descriptions
Table 492. D2DI Status Register 0 (D2DSTAT0)
CNCLF
MM912_634 Advance Information, Rev. 4.0
5
0
TIMEF
NOTE
4
0
Description
Description
TERRF
3
0
PARF
2
0
PAR1
1
0
Access: User read/write
PAR0
0
0
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