MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 164

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.28.3.1.4
If the pin is used as an output this register allows the configuration of the drive strength.
4.28.3.1.5
This register turns on a pull-up or pull-down device. It becomes active only if the pin is used as an input.
4.28.3.2
4.28.3.2.1
This port is associated with the SPI. Port A pins PA7-0 can be used for general-purpose I/O and PA3-0 also with the SPI
subsystem.
4.28.3.2.2
This port is associated with the D2DI interface. Port C pins PC1-0 can be used as the D2DI interrupt input and D2DI clock output,
respectively. A pull-down device is enabled on pin PC1 if used as D2DI input.A reduced drive strength can be selected on PC0
if used as D2DI output. The D2DI interrupt input is synchronized and has an asynchronous bypass in STOP mode to allow the
generation of a wake-up interrupt.
4.28.3.2.3
This port is associated with the D2DI interface. Port D pins PD7-0 can be used with the D2DI data I/O. Pull-down devices are
enabled on all pins if used as D2DI inputs.A reduced drive strength can be selected on all pins if used as D2DI outputs.
4.28.3.2.4
This port is associated with the CPMU OSC. Port E pins PE1-0 can be used for general-purpose or with the CPMU OSC module.
4.28.4
4.28.4.1
It is not recommended to write PTx and DDRx in a word access. When changing the register pins from inputs to outputs, the data
may have extra transitions during the write access. Initialize the port data register before enabling the outputs.
Freescale Semiconductor
Initialization Information
Ports
Port Data and Data Direction Register writes
Reduced Drive Register (RDRIV)
Pull Device Enable Register (PUCR)
Port A
Port C
Port D
Port E
Module
Periph.
data out
output enable
port enable
data in
Figure 46. Illustration of I/O Pin Functionality
PORTx
DDRx
PTIx
MM912_634 Advance Information, Rev. 4.0
0
1
synch.
1
0
0
1
Port Integration Module (S12IPIMV1)
PIN
164