TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 210

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

10 16-bit Multi-purpose Timers (MPTs)
＜MTTBCLK1:0＞:Selects the MPT timer count source clock.
＜MTTBCLE＞:Clears and controls the MPTn up-counter.
＜MTTBCPM1:0＞:Specifies MPTn capture timing.
Read/Write
After reset
Read/Write
Read/Write
Read/Write
bit Symbol
bit Symbol
bit Symbol
bit Symbol
After reset
After reset
After reset
10.4.1.5
Function
Function
Function
Function
MPT mode register <Timer mode>
“0” is read. Writes to
31
23
15
00: select MTnTBIN input pin
01: select φT1
10: select φT4
11: select φT16 (1/32φT0)
“0”: Disables clearing of the up-counter.
“1”: Clears up-counter if there is a match with timer register 1 (MTnRG1).
“00”: Capture disable
“01”: Takes count values into capture register 0 (MTnCP0) upon rising of MTnTBIN pin
input.
input. Takes count values into capture register 1 (MTnCP1) upon falling of MTnTBIN
pin input.
“11”: Capture disable
R
R
R
0
0
0
R
-
-
-
7
0
“10”: Takes count values into capture register 0 (MTnCP0) upon rising of MTnTBIN pin
-
0 and 1
(when
1: Must be
timer
registers
MTTBWBF=1)
written
separately
written
simultaneo
usly
MTTBRSWR
0: Can be
R/W
30
22
14
R
R
R
0
0
0
-
-
-
6
0
TMPM380/M382 - 10 / 87 -
Software
capture
control
0: Software
capture
1: Don't
care
MTTBCP
(1/8φT0)
(1/2φT0)
29
21
13
R
R
R
W
0
0
0
-
-
-
5
1
MTnTBMOD (n=0, 1, 2)
00: Disable
01: MTnTBIN ↑
10: MTnTBIN ↑ MTnTBIN ↓
11: Disable
Capture timing
MTTBCPM1 MTTBCPM0
28
20
12
R
R
R
0
0
0
4
0
-
-
-
“0” is read.
“0” is read.
“0” is read.
R/W
27
19
11
R
R
R
0
0
0
3
0
-
-
-
control
0:disable
Clearing
1:
clearing
MTTBCLE
Up-counter
R/W
26
18
10
R
R
R
0
0
0
2
0
-
-
-
enable
00: MTnTBIN pin input
01: φT1
10: φT4
11: φT16
MTTBCLK1
Source clock for Timer
25
17
R
R
R
0
0
9
0
1
0
-
-
-
R/W
TMPM380/M382
MTTBCLK0
24
16
R
R
R
0
0
8
0
0
0
-
-
-