TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 481

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
16.2.11 Remote Control Receive Status Register [RMCRSTAT]
<RMCRLIF>:
<RMCLOIF>:
<RMCDMAXIF>:
<RMCEDIF>:
<RMCRLDR>:
<RMCRNUM6:0>:
(Note 1)
(Note 2)
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
This register is updated every time an interrupt is generated.
Writing to this register is ignored.
RMC keeps receiving 73 bit or more data unless reception is completed by detecting
the maximum data bit cycle or the excess low width. If so, the received data in the
data buffer may not be correct.
Function
Indicates that leader detection is the interrupt factor.
Indicates that low width detection is the interrupt factor.
Indicates that maximum data bit cycle detection is the interrupt factor.
Indicates that a remote control input falling edge interrupt is the interrupt factor.
Detects a leader of a received remote control signal
Indicates the number of bits received as remote control signal data. The number
cannot be monitored during reception. On completion of reception, the number is
stored.
RMCRLDR RMCRNU
Leader
detection
is
interrupt
factor?
0: No
1: Yes
Leader
detection
0: No
1: Yes
RMCRLIF
15
R
7
R
0
0
TMPM380/M382 - 11 / 25 -
Low width
0: No
1: Yes
The number of received data bit
0y0000000:no data bit (only with leader)
0y0000001~0y1001000:1~72bit
0y1001001~0y1111111:73bit and more
RMCLOIF RMCDMAX
detection
is interrupt
factor?
14
M6
R
6
0
Maximum
data bit
cycle
detection
is interrupt
factor?
0: No
1: Yes
RMCRNU
13
M5
IF
R
5
0
1: Yes
RMCEDIF
Remote
control
input
falling
edge
interrupt
is
interrupt
factor?
0: No
RMCRNU
12
M4
R
4
0
RMCRNU
11
M3
3
R
0
RMCRNU
10
M2
2
”0” is read.
R
0
RMCRNU
TMPM380/M382
M1
9
1
RMCRNU
M0
8
0

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