TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 566

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

23.2.2 User Boot Mode (Single chip mode)
The condition to switch the modes needs to be set by using the I/O of TMPM380/382 in
User Boot mode is to use flash memory programming routine defined by users. It is used when
the data transfer buses for flash memory program code on the old application and for serial I/O
are different. It operates at the single chip mode; therefore, a switch from normal mode in which
user application is activated at the single chip mode to User Boot Mode for programming flash is
required. Specifically, add a mode judgment routine to a reset program in the old application.
conformity with the user’s system setup condition. Also, flash memory programming routine
that the user uniquely makes up needs to be set in the new application. This routine is used
for programming after being switched to User Boot Mode. The execution of the programming
routine must take place while it is stored in the area other than the flash memory since the
data in the internal flash memory cannot be read out during delete/ writing mode. Once
re-programming is complete, it is recommended to protect relevant flash blocks from
accidental corruption during subsequent Single-Chip (Normal mode) operations. All the
interruption including a non-maskable are inhibited at User Boot Mode.
(1-A) and (1-B) are the examples of programming with routines in the internal flash memory
and in the external memory. For a detailed description of the erase and program sequence,
refer to On-board Programming of Flash Memory (Rewrite/Erase).
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TMPM380/M382