TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 468

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

8-bit receive mode
Set the control register to the receive mode. Then writing “1” to SBInCR1 <SIOS> enables
reception. Data is taken into the shift register from the SI pin, with the least-significant bit
(LSB) first, in synchronization with the serial clock. Once the shift register is loaded with the
8-bit data, it transfers the received data to SBInDBR and the INTSBIn (buffer-full) interrupt
request is generated to request reading the received data. The interrupt service program
then reads the received data from SBInDBR.
state until the received data is read from SBInDBR.
external clock. The maximum data transfer rate varies, depending on the maximum latency
between generating the interrupt request and reading the received data.
Reception can be terminated by clearing <SIOS> to “0” or setting <SIOINH> to “1” in the
INTSBIn interrupt service program. If <SIOS> is cleared, reception continues until all the
bits of received data are written to SBInDBR. The program checks SBInSR <SIOF> to
determine whether reception has come to an end. <SIOF> is cleared to “0” at the end of
reception. After confirming the completion of the reception, last received data is read. If
<SIOINH> is set to “1,” the reception is aborted immediately and <SIOF> is cleared to “0.”
(The received data becomes invalid, and there is no need to read it out.)
INTSBIn interrupt
In the internal clock mode, the serial clock will be stopped and automatically be in the wait
In the external clock mode, shift operations are executed in synchronization with the
(Note) The contents of SBInDBR will not be retained after the transfer mode is
SBInCR1 ← 0 1 1 1 0 X X X
SBInCR1 ← 1 0 1 1 0 0 0 0
Reg.
changed. The ongoing reception must be completed by clearing <SIOS> to
“0” and the last received data must be read before the transfer mode is
changed.
← SBInDBR
7 6 5 4 3 2 1 0
TMPM380/M382 - 39 / 41 -
Selects the receive mode.
Starts reception.
Reads the received data.
TMPM380/M382