TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 44

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
The following are the procedure of switching over from the internal oscillator(OSC2) to the external
oscillator(OSC1).
Input frequency
osc1
osc2
6.3.5
(Note1)
(Note2)
(Note3)
(Note4)
(Note )
internal oscillator is available, and external oscillator is stop. The high-speed clocks are dividable.
6.3.5.1 High speed clock
The TMPM380 offers three selectable system clocks : two high-speed clocks and one low-speed clock.
Two kinds of high-speed clocks are selectable either internal oscillator or external oscillator. After reset,
(1) Disables port M registers (PMCR/PMPUP/PMPDN/PMIE). After reset, these registers are
(2) Specifies proper warm-up time for the external oscillator in to CGOSCCR[31:20]<WUODR13 to 2>.
(3) Sets CGOSCCR<HOSCON> to "1" to switch over from the port M to oscillator connection pins.
(4) Sets CGOSCCR<XEN1> to "1" to enable the external oscillator.
(5) Sets CGOSCCR<WUPSEL2> to "1" to specify the external oscillator clock as source clock for
(7) Sets CGOSCCR<OSCSEL> to "1" to switch the system clock to the external oscillator.
(6) Sets CGOSCCR<WUEON> to "1" to start warm-up and waits till the end of warm-up
10MHz
10MHz
8MHz
(CGOSCCR<WUEF> becomes "0").
disabled.
warm-up counter.
System Clock
With setting CGOSCCR<HOSCON> to “1”, rewriting the port M registers (PMDATA/
PLL=ON/OFF setting: available in CGOSCCR<PLLON>
Clock gear setting: available in CGSYSCR<GEAR2:0>
Switching of clock gear is executed when a value is written to the CGSYSCR<GEAR2:0>
register. The actual switching takes place after a slight delay.
Do not select 1/16 of clock gear when PLL is set off.
** :Reserved
PMCR/ PMOD/ PMPUP/ PMPDN/ PMIE) are prohibited.
With clearing CGOSCCR<HOSCON> to “0”, rewriting the CGOSCCR<XEN1> is
prohibited.
operating
Input frequency from high-speed oscillator1 (X1 and X2) : 8MHz to 10MHz
Input frequency from high-speed oscillator2 (internal oscillator) : 10MHz
Clock gear:1/1, 1/2, 1/4, 1/8, 1/16 (after reset: 1/1)
1MHz
freq.
Min.
operating
40MHz
Max.
freq.
Table 6-2 Range of High-frequency (Unit:MHz)
(PLL=OFF,
After reset
CG=1/1)
10MHz
10MHz
TMPM380/M382 - 13 / 24
8MHz
1/1
32
40
40
Clock gear (PLL=ON)
1/2
16
20
20
1/4
10
10
8
1/8
4
5
5
1/16
2.5
2.5
2
1/1
10
10
8
Clock gear (PLL=OFF)
1/2
4
5
5
TMPM380/M382
1/4
2.5
2.5
2
1.25
1.25
1/8
1
1/16
**
**
**

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